gdb/m32c-tdep.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* Renesas M32C target-dependent code for GDB, the GNU debugger.

  3.    Copyright (C) 2004-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. #include "defs.h"
  21. #include "elf-bfd.h"
  22. #include "elf/m32c.h"
  23. #include "gdb/sim-m32c.h"
  24. #include "dis-asm.h"
  25. #include "gdbtypes.h"
  26. #include "regcache.h"
  27. #include "arch-utils.h"
  28. #include "frame.h"
  29. #include "frame-unwind.h"
  30. #include "dwarf2-frame.h"
  31. #include "dwarf2expr.h"
  32. #include "symtab.h"
  33. #include "gdbcore.h"
  34. #include "value.h"
  35. #include "reggroups.h"
  36. #include "prologue-value.h"
  37. #include "target.h"
  38. #include "objfiles.h"


  41. /* The m32c tdep structure.  */

  43. ‌static struct reggroup *m32c_dma_reggroup;

  45. struct m32c_reg;

  47. /* The type of a function that moves the value of REG between CACHE or
  48.    BUF --- in either direction.  */
  49. ‌typedef enum register_status (m32c_move_reg_t) (struct m32c_reg *reg,
  50.                                                 struct regcache *cache,
  51.                                                 void *buf);

  53. ‌struct m32c_reg
  54. {
  55.   /* The name of this register.  */
  56.   const char *name;

  58.   /* Its type.  */
  59.   struct type *type;

  61.   /* The architecture this register belongs to.  */
  62.   struct gdbarch *arch;

  64.   /* Its GDB register number.  */
  65.   int num;

  67.   /* Its sim register number.  */
  68.   int sim_num;

  70.   /* Its DWARF register number, or -1 if it doesn't have one.  */
  71.   int dwarf_num;

  73.   /* Register group memberships.  */
  74.   unsigned int general_p : 1;
  75.   unsigned int dma_p : 1;
  76.   unsigned int system_p : 1;
  77.   unsigned int save_restore_p : 1;

  79.   /* Functions to read its value from a regcache, and write its value
  80.      to a regcache.  */
  81.   m32c_move_reg_t *read, *write;

  83.   /* Data for READ and WRITE functions.  The exact meaning depends on
  84.      the specific functions selected; see the comments for those
  85.      functions.  */
  86.   struct m32c_reg *rx, *ry;
  87.   int n;
  88. };


  91. /* An overestimate of the number of raw and pseudoregisters we will
  92.    have.  The exact answer depends on the variant of the architecture
  93.    at hand, but we can use this to declare statically allocated
  94.    arrays, and bump it up when needed.  */
  95. ‌#define M32C_MAX_NUM_REGS (75)

  97. /* The largest assigned DWARF register number.  */
  98. ‌#define M32C_MAX_DWARF_REGNUM (40)


  101. ‌struct gdbarch_tdep
  102. {
  103.   /* All the registers for this variant, indexed by GDB register
  104.      number, and the number of registers present.  */
  105.   struct m32c_reg regs[M32C_MAX_NUM_REGS];

  107.   /* The number of valid registers.  */
  108.   int num_regs;

  110.   /* Interesting registers.  These are pointers into REGS.  */
  111.   struct m32c_reg *pc, *flg;
  112.   struct m32c_reg *r0, *r1, *r2, *r3, *a0, *a1;
  113.   struct m32c_reg *r2r0, *r3r2r1r0, *r3r1r2r0;
  114.   struct m32c_reg *sb, *fb, *sp;

  116.   /* A table indexed by DWARF register numbers, pointing into
  117.      REGS.  */
  118.   struct m32c_reg *dwarf_regs[M32C_MAX_DWARF_REGNUM + 1];

  120.   /* Types for this architecture.  We can't use the builtin_type_foo
  121.      types, because they're not initialized when building a gdbarch
  122.      structure.  */
  123.   struct type *voyd, *ptr_voyd, *func_voyd;
  124.   struct type *uint8, *uint16;
  125.   struct type *int8, *int16, *int32, *int64;

  127.   /* The types for data address and code address registers.  */
  128.   struct type *data_addr_reg_type, *code_addr_reg_type;

  130.   /* The number of bytes a return address pushed by a 'jsr' instruction
  131.      occupies on the stack.  */
  132.   int ret_addr_bytes;

  134.   /* The number of bytes an address register occupies on the stack
  135.      when saved by an 'enter' or 'pushm' instruction.  */
  136.   int push_addr_bytes;
  137. };


  140. /* Types.  */

  142. static void
  143. ‌make_types (struct gdbarch *arch)
  144. {
  145.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  146.   unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
  147.   int data_addr_reg_bits, code_addr_reg_bits;
  148.   char type_name[50];

  150. #if 0
  151.   /* This is used to clip CORE_ADDR values, so this value is
  152.      appropriate both on the m32c, where pointers are 32 bits long,
  153.      and on the m16c, where pointers are sixteen bits long, but there
  154.      may be code above the 64k boundary.  */
  155.   set_gdbarch_addr_bit (arch, 24);
  156. #else
  157.   /* GCC uses 32 bits for addrs in the dwarf info, even though
  158.      only 16/24 bits are used.  Setting addr_bit to 24 causes
  159.      errors in reading the dwarf addresses.  */
  160.   set_gdbarch_addr_bit (arch, 32);
  161. #endif

  163.   set_gdbarch_int_bit (arch, 16);
  164.   switch (mach)
  165.     {
  166.     case bfd_mach_m16c:
  167.       data_addr_reg_bits = 16;
  168.       code_addr_reg_bits = 24;
  169.       set_gdbarch_ptr_bit (arch, 16);
  170.       tdep->ret_addr_bytes = 3;
  171.       tdep->push_addr_bytes = 2;
  172.       break;

  174.     case bfd_mach_m32c:
  175.       data_addr_reg_bits = 24;
  176.       code_addr_reg_bits = 24;
  177.       set_gdbarch_ptr_bit (arch, 32);
  178.       tdep->ret_addr_bytes = 4;
  179.       tdep->push_addr_bytes = 4;
  180.       break;

  182.     default:
  183.       gdb_assert_not_reached ("unexpected mach");
  184.     }

  186.   /* The builtin_type_mumble variables are sometimes uninitialized when
  187.      this is called, so we avoid using them.  */
  188.   tdep->voyd = arch_type (arch, TYPE_CODE_VOID, 1, "void");
  189.   tdep->ptr_voyd
  190.     = arch_type (arch, TYPE_CODE_PTR, gdbarch_ptr_bit (arch) / TARGET_CHAR_BIT,
  191.                  NULL);
  192.   TYPE_TARGET_TYPE (tdep->ptr_voyd) = tdep->voyd;
  193.   TYPE_UNSIGNED (tdep->ptr_voyd) = 1;
  194.   tdep->func_voyd = lookup_function_type (tdep->voyd);

  196.   xsnprintf (type_name, sizeof (type_name), "%s_data_addr_t",
  197.              gdbarch_bfd_arch_info (arch)->printable_name);
  198.   tdep->data_addr_reg_type
  199.     = arch_type (arch, TYPE_CODE_PTR, data_addr_reg_bits / TARGET_CHAR_BIT,
  200.                  xstrdup (type_name));
  201.   TYPE_TARGET_TYPE (tdep->data_addr_reg_type) = tdep->voyd;
  202.   TYPE_UNSIGNED (tdep->data_addr_reg_type) = 1;

  204.   xsnprintf (type_name, sizeof (type_name), "%s_code_addr_t",
  205.              gdbarch_bfd_arch_info (arch)->printable_name);
  206.   tdep->code_addr_reg_type
  207.     = arch_type (arch, TYPE_CODE_PTR, code_addr_reg_bits / TARGET_CHAR_BIT,
  208.                  xstrdup (type_name));
  209.   TYPE_TARGET_TYPE (tdep->code_addr_reg_type) = tdep->func_voyd;
  210.   TYPE_UNSIGNED (tdep->code_addr_reg_type) = 1;

  212.   tdep->uint8  = arch_integer_type (arch,  8, 1, "uint8_t");
  213.   tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t");
  214.   tdep->int8   = arch_integer_type (arch,  8, 0, "int8_t");
  215.   tdep->int16  = arch_integer_type (arch, 16, 0, "int16_t");
  216.   tdep->int32  = arch_integer_type (arch, 32, 0, "int32_t");
  217.   tdep->int64  = arch_integer_type (arch, 64, 0, "int64_t");
  218. }



  222. /* Register set.  */

  224. static const char *
  225. ‌m32c_register_name (struct gdbarch *gdbarch, int num)
  226. {
  227.   return gdbarch_tdep (gdbarch)->regs[num].name;
  228. }


  231. static struct type *
  232. ‌m32c_register_type (struct gdbarch *arch, int reg_nr)
  233. {
  234.   return gdbarch_tdep (arch)->regs[reg_nr].type;
  235. }


  238. static int
  239. ‌m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
  240. {
  241.   return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
  242. }


  245. static int
  246. ‌m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr)
  247. {
  248.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  249.   if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
  250.       && tdep->dwarf_regs[reg_nr])
  251.     return tdep->dwarf_regs[reg_nr]->num;
  252.   else
  253.     /* The DWARF CFI code expects to see -1 for invalid register
  254.        numbers.  */
  255.     return -1;
  256. }


  259. static int
  260. ‌m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
  261.                           struct reggroup *group)
  262. {
  263.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  264.   struct m32c_reg *reg = &tdep->regs[regnum];

  266.   /* The anonymous raw registers aren't in any groups.  */
  267.   if (! reg->name)
  268.     return 0;

  270.   if (group == all_reggroup)
  271.     return 1;

  273.   if (group == general_reggroup
  274.       && reg->general_p)
  275.     return 1;

  277.   if (group == m32c_dma_reggroup
  278.       && reg->dma_p)
  279.     return 1;

  281.   if (group == system_reggroup
  282.       && reg->system_p)
  283.     return 1;

  285.   /* Since the m32c DWARF register numbers refer to cooked registers, not
  286.      raw registers, and frame_pop depends on the save and restore groups
  287.      containing registers the DWARF CFI will actually mention, our save
  288.      and restore groups are cooked registers, not raw registers.  (This is
  289.      why we can't use the default reggroup function.)  */
  290.   if ((group == save_reggroup
  291.        || group == restore_reggroup)
  292.       && reg->save_restore_p)
  293.     return 1;

  295.   return 0;
  296. }


  299. /* Register move functions.  We declare them here using
  300.    m32c_move_reg_t to check the types.  */
  301. ‌‌static m32c_move_reg_t m32c_raw_read,      m32c_raw_write;
  302. ‌‌static m32c_move_reg_t m32c_banked_read,   m32c_banked_write;
  303. ‌‌static m32c_move_reg_t m32c_sb_read,            m32c_sb_write;
  304. ‌‌static m32c_move_reg_t m32c_part_read,     m32c_part_write;
  305. ‌‌static m32c_move_reg_t m32c_cat_read,      m32c_cat_write;
  306. ‌‌static m32c_move_reg_t m32c_r3r2r1r0_read, m32c_r3r2r1r0_write;


  309. /* Copy the value of the raw register REG from CACHE to BUF.  */
  310. static enum register_status
  311. ‌m32c_raw_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  312. {
  313.   return regcache_raw_read (cache, reg->num, buf);
  314. }


  317. /* Copy the value of the raw register REG from BUF to CACHE.  */
  318. static enum register_status
  319. ‌m32c_raw_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  320. {
  321.   regcache_raw_write (cache, reg->num, (const void *) buf);

  323.   return REG_VALID;
  324. }


  327. /* Return the value of the 'flg' register in CACHE.  */
  328. static int
  329. ‌m32c_read_flg (struct regcache *cache)
  330. {
  331.   struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (cache));
  332.   ULONGEST flg;
  333.   regcache_raw_read_unsigned (cache, tdep->flg->num, &flg);
  334.   return flg & 0xffff;
  335. }


  338. /* Evaluate the real register number of a banked register.  */
  339. static struct m32c_reg *
  340. ‌m32c_banked_register (struct m32c_reg *reg, struct regcache *cache)
  341. {
  342.   return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
  343. }


  346. /* Move the value of a banked register from CACHE to BUF.
  347.    If the value of the 'flg' register in CACHE has any of the bits
  348.    masked in REG->n set, then read REG->ry.  Otherwise, read
  349.    REG->rx.  */
  350. static enum register_status
  351. ‌m32c_banked_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  352. {
  353.   struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
  354.   return regcache_raw_read (cache, bank_reg->num, buf);
  355. }


  358. /* Move the value of a banked register from BUF to CACHE.
  359.    If the value of the 'flg' register in CACHE has any of the bits
  360.    masked in REG->n set, then write REG->ry.  Otherwise, write
  361.    REG->rx.  */
  362. static enum register_status
  363. ‌m32c_banked_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  364. {
  365.   struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
  366.   regcache_raw_write (cache, bank_reg->num, (const void *) buf);

  368.   return REG_VALID;
  369. }


  372. /* Move the value of SB from CACHE to BUF.  On bfd_mach_m32c, SB is a
  373.    banked register; on bfd_mach_m16c, it's not.  */
  374. static enum register_status
  375. ‌m32c_sb_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  376. {
  377.   if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
  378.     return m32c_raw_read (reg->rx, cache, buf);
  379.   else
  380.     return m32c_banked_read (reg, cache, buf);
  381. }


  384. /* Move the value of SB from BUF to CACHE.  On bfd_mach_m32c, SB is a
  385.    banked register; on bfd_mach_m16c, it's not.  */
  386. static enum register_status
  387. ‌m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  388. {
  389.   if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
  390.     m32c_raw_write (reg->rx, cache, buf);
  391.   else
  392.     m32c_banked_write (reg, cache, buf);

  394.   return REG_VALID;
  395. }


  398. /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
  399.    and *LEN_P to the offset and length, in bytes, of the part REG
  400.    occupies in its underlying register.  The offset is from the
  401.    lower-addressed end, regardless of the architecture's endianness.
  402.    (The M32C family is always little-endian, but let's keep those
  403.    assumptions out of here.)  */
  404. static void
  405. ‌m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
  406. {
  407.   /* The length of the containing register, of which REG is one part.  */
  408.   int containing_len = TYPE_LENGTH (reg->rx->type);

  410.   /* The length of one "element" in our imaginary array.  */
  411.   int elt_len = TYPE_LENGTH (reg->type);

  413.   /* The offset of REG's "element" from the least significant end of
  414.      the containing register.  */
  415.   int elt_offset = reg->n * elt_len;

  417.   /* If we extend off the end, trim the length of the element.  */
  418.   if (elt_offset + elt_len > containing_len)
  419.     {
  420.       elt_len = containing_len - elt_offset;
  421.       /* We shouldn't be declaring partial registers that go off the
  422.          end of their containing registers.  */
  423.       gdb_assert (elt_len > 0);
  424.     }

  426.   /* Flip the offset around if we're big-endian.  */
  427.   if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
  428.     elt_offset = TYPE_LENGTH (reg->rx->type) - elt_offset - elt_len;

  430.   *offset_p = elt_offset;
  431.   *len_p = elt_len;
  432. }


  435. /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
  436.    to BUF.  Treating the value of the register REG->rx as an array of
  437.    REG->type values, where higher indices refer to more significant
  438.    bits, read the value of the REG->n'th element.  */
  439. static enum register_status
  440. ‌m32c_part_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  441. {
  442.   int offset, len;

  444.   memset (buf, 0, TYPE_LENGTH (reg->type));
  445.   m32c_find_part (reg, &offset, &len);
  446.   return regcache_cooked_read_part (cache, reg->rx->num, offset, len, buf);
  447. }


  450. /* Move the value of a banked register from BUF to CACHE.
  451.    Treating the value of the register REG->rx as an array of REG->type
  452.    values, where higher indices refer to more significant bits, write
  453.    the value of the REG->n'th element.  */
  454. static enum register_status
  455. ‌m32c_part_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  456. {
  457.   int offset, len;

  459.   m32c_find_part (reg, &offset, &len);
  460.   regcache_cooked_write_part (cache, reg->rx->num, offset, len, buf);

  462.   return REG_VALID;
  463. }


  466. /* Move the value of REG from CACHE to BUF.  REG's value is the
  467.    concatenation of the values of the registers REG->rx and REG->ry,
  468.    with REG->rx contributing the more significant bits.  */
  469. static enum register_status
  470. ‌m32c_cat_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  471. {
  472.   int high_bytes = TYPE_LENGTH (reg->rx->type);
  473.   int low_bytes  = TYPE_LENGTH (reg->ry->type);
  474.   /* For address arithmetic.  */
  475.   unsigned char *cbuf = buf;
  476.   enum register_status status;

  478.   gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);

  480.   if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
  481.     {
  482.       status = regcache_cooked_read (cache, reg->rx->num, cbuf);
  483.       if (status == REG_VALID)
  484.         status = regcache_cooked_read (cache, reg->ry->num, cbuf + high_bytes);
  485.     }
  486.   else
  487.     {
  488.       status = regcache_cooked_read (cache, reg->rx->num, cbuf + low_bytes);
  489.       if (status == REG_VALID)
  490.         status = regcache_cooked_read (cache, reg->ry->num, cbuf);
  491.     }

  493.   return status;
  494. }


  497. /* Move the value of REG from CACHE to BUF.  REG's value is the
  498.    concatenation of the values of the registers REG->rx and REG->ry,
  499.    with REG->rx contributing the more significant bits.  */
  500. static enum register_status
  501. ‌m32c_cat_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  502. {
  503.   int high_bytes = TYPE_LENGTH (reg->rx->type);
  504.   int low_bytes  = TYPE_LENGTH (reg->ry->type);
  505.   /* For address arithmetic.  */
  506.   unsigned char *cbuf = buf;

  508.   gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);

  510.   if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
  511.     {
  512.       regcache_cooked_write (cache, reg->rx->num, cbuf);
  513.       regcache_cooked_write (cache, reg->ry->num, cbuf + high_bytes);
  514.     }
  515.   else
  516.     {
  517.       regcache_cooked_write (cache, reg->rx->num, cbuf + low_bytes);
  518.       regcache_cooked_write (cache, reg->ry->num, cbuf);
  519.     }

  521.   return REG_VALID;
  522. }


  525. /* Copy the value of the raw register REG from CACHE to BUF.  REG is
  526.    the concatenation (from most significant to least) of r3, r2, r1,
  527.    and r0.  */
  528. static enum register_status
  529. ‌m32c_r3r2r1r0_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
  530. {
  531.   struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
  532.   int len = TYPE_LENGTH (tdep->r0->type);
  533.   enum register_status status;

  535.   /* For address arithmetic.  */
  536.   unsigned char *cbuf = buf;

  538.   if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
  539.     {
  540.       status = regcache_cooked_read (cache, tdep->r0->num, cbuf + len * 3);
  541.       if (status == REG_VALID)
  542.         status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 2);
  543.       if (status == REG_VALID)
  544.         status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 1);
  545.       if (status == REG_VALID)
  546.         status = regcache_cooked_read (cache, tdep->r3->num, cbuf);
  547.     }
  548.   else
  549.     {
  550.       status = regcache_cooked_read (cache, tdep->r0->num, cbuf);
  551.       if (status == REG_VALID)
  552.         status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 1);
  553.       if (status == REG_VALID)
  554.         status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 2);
  555.       if (status == REG_VALID)
  556.         status = regcache_cooked_read (cache, tdep->r3->num, cbuf + len * 3);
  557.     }

  559.   return status;
  560. }


  563. /* Copy the value of the raw register REG from BUF to CACHE.  REG is
  564.    the concatenation (from most significant to least) of r3, r2, r1,
  565.    and r0.  */
  566. static enum register_status
  567. ‌m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
  568. {
  569.   struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
  570.   int len = TYPE_LENGTH (tdep->r0->type);

  572.   /* For address arithmetic.  */
  573.   unsigned char *cbuf = buf;

  575.   if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
  576.     {
  577.       regcache_cooked_write (cache, tdep->r0->num, cbuf + len * 3);
  578.       regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 2);
  579.       regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 1);
  580.       regcache_cooked_write (cache, tdep->r3->num, cbuf);
  581.     }
  582.   else
  583.     {
  584.       regcache_cooked_write (cache, tdep->r0->num, cbuf);
  585.       regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 1);
  586.       regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 2);
  587.       regcache_cooked_write (cache, tdep->r3->num, cbuf + len * 3);
  588.     }

  590.   return REG_VALID;
  591. }


  594. static enum register_status
  595. ‌m32c_pseudo_register_read (struct gdbarch *arch,
  596.                            struct regcache *cache,
  597.                            int cookednum,
  598.                            gdb_byte *buf)
  599. {
  600.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  601.   struct m32c_reg *reg;

  603.   gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
  604.   gdb_assert (arch == get_regcache_arch (cache));
  605.   gdb_assert (arch == tdep->regs[cookednum].arch);
  606.   reg = &tdep->regs[cookednum];

  608.   return reg->read (reg, cache, buf);
  609. }


  612. static void
  613. ‌m32c_pseudo_register_write (struct gdbarch *arch,
  614.                             struct regcache *cache,
  615.                             int cookednum,
  616.                             const gdb_byte *buf)
  617. {
  618.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  619.   struct m32c_reg *reg;

  621.   gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
  622.   gdb_assert (arch == get_regcache_arch (cache));
  623.   gdb_assert (arch == tdep->regs[cookednum].arch);
  624.   reg = &tdep->regs[cookednum];

  626.   reg->write (reg, cache, (void *) buf);
  627. }


  630. /* Add a register with the given fields to the end of ARCH's table.
  631.    Return a pointer to the newly added register.  */
  632. static struct m32c_reg *
  633. ‌add_reg (struct gdbarch *arch,
  634.          const char *name,
  635.          struct type *type,
  636.          int sim_num,
  637.          m32c_move_reg_t *read,
  638.          m32c_move_reg_t *write,
  639.          struct m32c_reg *rx,
  640.          struct m32c_reg *ry,
  641.          int n)
  642. {
  643.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  644.   struct m32c_reg *r = &tdep->regs[tdep->num_regs];

  646.   gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);

  648.   r->name           = name;
  649.   r->type           = type;
  650.   r->arch           = arch;
  651.   r->num            = tdep->num_regs;
  652.   r->sim_num        = sim_num;
  653.   r->dwarf_num      = -1;
  654.   r->general_p      = 0;
  655.   r->dma_p          = 0;
  656.   r->system_p       = 0;
  657.   r->save_restore_p = 0;
  658.   r->read           = read;
  659.   r->write          = write;
  660.   r->rx             = rx;
  661.   r->ry             = ry;
  662.   r->n              = n;

  664.   tdep->num_regs++;

  666.   return r;
  667. }


  670. /* Record NUM as REG's DWARF register number.  */
  671. static void
  672. ‌set_dwarf_regnum (struct m32c_reg *reg, int num)
  673. {
  674.   gdb_assert (num < M32C_MAX_NUM_REGS);

  676.   /* Update the reg->DWARF mapping.  Only count the first number
  677.      assigned to this register.  */
  678.   if (reg->dwarf_num == -1)
  679.     reg->dwarf_num = num;

  681.   /* Update the DWARF->reg mapping.  */
  682.   gdbarch_tdep (reg->arch)->dwarf_regs[num] = reg;
  683. }


  686. /* Mark REG as a general-purpose register, and return it.  */
  687. static struct m32c_reg *
  688. ‌mark_general (struct m32c_reg *reg)
  689. {
  690.   reg->general_p = 1;
  691.   return reg;
  692. }


  695. /* Mark REG as a DMA register, and return it.  */
  696. static struct m32c_reg *
  697. ‌mark_dma (struct m32c_reg *reg)
  698. {
  699.   reg->dma_p = 1;
  700.   return reg;
  701. }


  704. /* Mark REG as a SYSTEM register, and return it.  */
  705. static struct m32c_reg *
  706. ‌mark_system (struct m32c_reg *reg)
  707. {
  708.   reg->system_p = 1;
  709.   return reg;
  710. }


  713. /* Mark REG as a save-restore register, and return it.  */
  714. static struct m32c_reg *
  715. ‌mark_save_restore (struct m32c_reg *reg)
  716. {
  717.   reg->save_restore_p = 1;
  718.   return reg;
  719. }


  722. ‌#define FLAGBIT_B        0x0010
  723. ‌#define FLAGBIT_U        0x0080

  725. /* Handy macros for declaring registers.  These all evaluate to
  726.    pointers to the register declared.  Macros that define two
  727.    registers evaluate to a pointer to the first.  */

  729. /* A raw register named NAME, with type TYPE and sim number SIM_NUM.  */
  730. ‌#define R(name, type, sim_num)                                        \
  731.   (add_reg (arch, (name), (type), (sim_num),                        \
  732.             m32c_raw_read, m32c_raw_write, NULL, NULL, 0))

  734. /* The simulator register number for a raw register named NAME.  */
  735. ‌#define SIM(name) (m32c_sim_reg_ ## name)

  737. /* A raw unsigned 16-bit data register named NAME.
  738.    NAME should be an identifier, not a string.  */
  739. ‌#define R16U(name)                                                \
  740.   (R(#name, tdep->uint16, SIM (name)))

  742. /* A raw data address register named NAME.
  743.    NAME should be an identifier, not a string.  */
  744. ‌#define RA(name)                                                \
  745.   (R(#name, tdep->data_addr_reg_type, SIM (name)))

  747. /* A raw code address register named NAME.  NAME should
  748.    be an identifier, not a string.  */
  749. ‌#define RC(name)                                                \
  750.   (R(#name, tdep->code_addr_reg_type, SIM (name)))

  752. /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
  753.    NAME should be an identifier, not a string.  */
  754. ‌#define RP(name, type)                                \
  755.   (R(#name "0", (type), SIM (name ## 0)),        \
  756.    R(#name "1", (type), SIM (name ## 1)) - 1)

  758. /* A raw banked general-purpose data register named NAME.
  759.    NAME should be an identifier, not a string.  */
  760. ‌#define RBD(name)                                                \
  761.   (R(NULL, tdep->int16, SIM (name ## _bank0)),                \
  762.    R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)

  764. /* A raw banked data address register named NAME.
  765.    NAME should be an identifier, not a string.  */
  766. ‌#define RBA(name)                                                \
  767.   (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)),        \
  768.    R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)

  770. /* A cooked register named NAME referring to a raw banked register
  771.    from the bank selected by the current value of FLG.  RAW_PAIR
  772.    should be a pointer to the first register in the banked pair.
  773.    NAME must be an identifier, not a string.  */
  774. ‌#define CB(name, raw_pair)                                \
  775.   (add_reg (arch, #name, (raw_pair)->type, 0,                \
  776.             m32c_banked_read, m32c_banked_write,        \
  777.             (raw_pair), (raw_pair + 1), FLAGBIT_B))

  779. /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
  780.    access the top and bottom halves of the register pointed to by
  781.    NAME.  NAME should be an identifier.  */
  782. ‌#define CHL(name, type)                                                        \
  783.   (add_reg (arch, #name "h", (type), 0,                                        \
  784.             m32c_part_read, m32c_part_write, name, NULL, 1),                \
  785.    add_reg (arch, #name "l", (type), 0,                                        \
  786.             m32c_part_read, m32c_part_write, name, NULL, 0) - 1)

  788. /* A register constructed by concatenating the two registers HIGH and
  789.    LOW, whose name is HIGHLOW and whose type is TYPE.  */
  790. ‌#define CCAT(high, low, type)                                        \
  791.   (add_reg (arch, #high #low, (type), 0,                        \
  792.             m32c_cat_read, m32c_cat_write, (high), (low), 0))

  794. /* Abbreviations for marking register group membership.  */
  795. ‌#define G(reg)   (mark_general (reg))
  796. ‌#define S(reg)   (mark_system  (reg))
  797. ‌#define DMA(reg) (mark_dma     (reg))


  800. /* Construct the register set for ARCH.  */
  801. static void
  802. ‌make_regs (struct gdbarch *arch)
  803. {
  804.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  805.   int mach = gdbarch_bfd_arch_info (arch)->mach;
  806.   int num_raw_regs;
  807.   int num_cooked_regs;

  809.   struct m32c_reg *r0;
  810.   struct m32c_reg *r1;
  811.   struct m32c_reg *r2;
  812.   struct m32c_reg *r3;
  813.   struct m32c_reg *a0;
  814.   struct m32c_reg *a1;
  815.   struct m32c_reg *fb;
  816.   struct m32c_reg *sb;
  817.   struct m32c_reg *sp;
  818.   struct m32c_reg *r0hl;
  819.   struct m32c_reg *r1hl;
  820.   struct m32c_reg *r2hl;
  821.   struct m32c_reg *r3hl;
  822.   struct m32c_reg *intbhl;
  823.   struct m32c_reg *r2r0;
  824.   struct m32c_reg *r3r1;
  825.   struct m32c_reg *r3r1r2r0;
  826.   struct m32c_reg *r3r2r1r0;
  827.   struct m32c_reg *a1a0;

  829.   struct m32c_reg *raw_r0_pair = RBD (r0);
  830.   struct m32c_reg *raw_r1_pair = RBD (r1);
  831.   struct m32c_reg *raw_r2_pair = RBD (r2);
  832.   struct m32c_reg *raw_r3_pair = RBD (r3);
  833.   struct m32c_reg *raw_a0_pair = RBA (a0);
  834.   struct m32c_reg *raw_a1_pair = RBA (a1);
  835.   struct m32c_reg *raw_fb_pair = RBA (fb);

  837.   /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
  838.      We always declare both raw registers, and deal with the distinction
  839.      in the pseudoregister.  */
  840.   struct m32c_reg *raw_sb_pair = RBA (sb);

  842.   struct m32c_reg *usp         = S (RA (usp));
  843.   struct m32c_reg *isp         = S (RA (isp));
  844.   struct m32c_reg *intb        = S (RC (intb));
  845.   struct m32c_reg *pc          = G (RC (pc));
  846.   struct m32c_reg *flg         = G (R16U (flg));

  848.   if (mach == bfd_mach_m32c)
  849.     {
  850.       struct m32c_reg *svf     = S (R16U (svf));
  851.       struct m32c_reg *svp     = S (RC (svp));
  852.       struct m32c_reg *vct     = S (RC (vct));

  854.       struct m32c_reg *dmd01   = DMA (RP (dmd, tdep->uint8));
  855.       struct m32c_reg *dct01   = DMA (RP (dct, tdep->uint16));
  856.       struct m32c_reg *drc01   = DMA (RP (drc, tdep->uint16));
  857.       struct m32c_reg *dma01   = DMA (RP (dma, tdep->data_addr_reg_type));
  858.       struct m32c_reg *dsa01   = DMA (RP (dsa, tdep->data_addr_reg_type));
  859.       struct m32c_reg *dra01   = DMA (RP (dra, tdep->data_addr_reg_type));
  860.     }

  862.   num_raw_regs = tdep->num_regs;

  864.   r0               = G (CB (r0, raw_r0_pair));
  865.   r1               = G (CB (r1, raw_r1_pair));
  866.   r2          = G (CB (r2, raw_r2_pair));
  867.   r3          = G (CB (r3, raw_r3_pair));
  868.   a0          = G (CB (a0, raw_a0_pair));
  869.   a1          = G (CB (a1, raw_a1_pair));
  870.   fb          = G (CB (fb, raw_fb_pair));

  872.   /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
  873.      Specify custom read/write functions that do the right thing.  */
  874.   sb          = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
  875.                             m32c_sb_read, m32c_sb_write,
  876.                             raw_sb_pair, raw_sb_pair + 1, 0));

  878.   /* The current sp is either usp or isp, depending on the value of
  879.      the FLG register's U bit.  */
  880.   sp          = G (add_reg (arch, "sp", usp->type, 0,
  881.                             m32c_banked_read, m32c_banked_write,
  882.                             isp, usp, FLAGBIT_U));

  884.   r0hl        = CHL (r0, tdep->int8);
  885.   r1hl        = CHL (r1, tdep->int8);
  886.   r2hl        = CHL (r2, tdep->int8);
  887.   r3hl        = CHL (r3, tdep->int8);
  888.   intbhl      = CHL (intb, tdep->int16);

  890.   r2r0        = CCAT (r2,   r0,   tdep->int32);
  891.   r3r1        = CCAT (r3,   r1,   tdep->int32);
  892.   r3r1r2r0    = CCAT (r3r1, r2r0, tdep->int64);

  894.   r3r2r1r0
  895.     = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
  896.                m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0);

  898.   if (mach == bfd_mach_m16c)
  899.     a1a0 = CCAT (a1, a0, tdep->int32);
  900.   else
  901.     a1a0 = NULL;

  903.   num_cooked_regs = tdep->num_regs - num_raw_regs;

  905.   tdep->pc            = pc;
  906.   tdep->flg           = flg;
  907.   tdep->r0            = r0;
  908.   tdep->r1            = r1;
  909.   tdep->r2            = r2;
  910.   tdep->r3            = r3;
  911.   tdep->r2r0          = r2r0;
  912.   tdep->r3r2r1r0 = r3r2r1r0;
  913.   tdep->r3r1r2r0 = r3r1r2r0;
  914.   tdep->a0       = a0;
  915.   tdep->a1       = a1;
  916.   tdep->sb       = sb;
  917.   tdep->fb            = fb;
  918.   tdep->sp            = sp;

  920.   /* Set up the DWARF register table.  */
  921.   memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
  922.   set_dwarf_regnum (r0hl + 1, 0x01);
  923.   set_dwarf_regnum (r0hl + 0, 0x02);
  924.   set_dwarf_regnum (r1hl + 1, 0x03);
  925.   set_dwarf_regnum (r1hl + 0, 0x04);
  926.   set_dwarf_regnum (r0,       0x05);
  927.   set_dwarf_regnum (r1,       0x06);
  928.   set_dwarf_regnum (r2,       0x07);
  929.   set_dwarf_regnum (r3,       0x08);
  930.   set_dwarf_regnum (a0,       0x09);
  931.   set_dwarf_regnum (a1,       0x0a);
  932.   set_dwarf_regnum (fb,       0x0b);
  933.   set_dwarf_regnum (sp,       0x0c);
  934.   set_dwarf_regnum (pc,       0x0d); /* GCC's invention */
  935.   set_dwarf_regnum (sb,       0x13);
  936.   set_dwarf_regnum (r2r0,     0x15);
  937.   set_dwarf_regnum (r3r1,     0x16);
  938.   if (a1a0)
  939.     set_dwarf_regnum (a1a0,   0x17);

  941.   /* Enumerate the save/restore register group.

  943.      The regcache_save and regcache_restore functions apply their read
  944.      function to each register in this group.

  946.      Since frame_pop supplies frame_unwind_register as its read
  947.      function, the registers meaningful to the Dwarf unwinder need to
  948.      be in this group.

  950.      On the other hand, when we make inferior calls, save_inferior_status
  951.      and restore_inferior_status use them to preserve the current register
  952.      values across the inferior call.  For this, you'd kind of like to
  953.      preserve all the raw registers, to protect the interrupted code from
  954.      any sort of bank switching the callee might have done.  But we handle
  955.      those cases so badly anyway --- for example, it matters whether we
  956.      restore FLG before or after we restore the general-purpose registers,
  957.      but there's no way to express that --- that it isn't worth worrying
  958.      about.

  960.      We omit control registers like inthl: if you call a function that
  961.      changes those, it's probably because you wanted that change to be
  962.      visible to the interrupted code.  */
  963.   mark_save_restore (r0);
  964.   mark_save_restore (r1);
  965.   mark_save_restore (r2);
  966.   mark_save_restore (r3);
  967.   mark_save_restore (a0);
  968.   mark_save_restore (a1);
  969.   mark_save_restore (sb);
  970.   mark_save_restore (fb);
  971.   mark_save_restore (sp);
  972.   mark_save_restore (pc);
  973.   mark_save_restore (flg);

  975.   set_gdbarch_num_regs (arch, num_raw_regs);
  976.   set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
  977.   set_gdbarch_pc_regnum (arch, pc->num);
  978.   set_gdbarch_sp_regnum (arch, sp->num);
  979.   set_gdbarch_register_name (arch, m32c_register_name);
  980.   set_gdbarch_register_type (arch, m32c_register_type);
  981.   set_gdbarch_pseudo_register_read (arch, m32c_pseudo_register_read);
  982.   set_gdbarch_pseudo_register_write (arch, m32c_pseudo_register_write);
  983.   set_gdbarch_register_sim_regno (arch, m32c_register_sim_regno);
  984.   set_gdbarch_stab_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
  985.   set_gdbarch_dwarf2_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
  986.   set_gdbarch_register_reggroup_p (arch, m32c_register_reggroup_p);

  988.   reggroup_add (arch, general_reggroup);
  989.   reggroup_add (arch, all_reggroup);
  990.   reggroup_add (arch, save_reggroup);
  991.   reggroup_add (arch, restore_reggroup);
  992.   reggroup_add (arch, system_reggroup);
  993.   reggroup_add (arch, m32c_dma_reggroup);
  994. }



  998. /* Breakpoints.  */

  1000. static const unsigned char *
  1001. ‌m32c_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
  1002. {
  1003.   static unsigned char break_insn[] = { 0x00 };        /* brk */

  1005.   *len = sizeof (break_insn);
  1006.   return break_insn;
  1007. }



  1011. /* Prologue analysis.  */

  1013. ‌struct m32c_prologue
  1014. {
  1015.   /* For consistency with the DWARF 2 .debug_frame info generated by
  1016.      GCC, a frame's CFA is the address immediately after the saved
  1017.      return address.  */

  1019.   /* The architecture for which we generated this prologue info.  */
  1020.   struct gdbarch *arch;

  1022.   enum {
  1023.     /* This function uses a frame pointer.  */
  1024.     prologue_with_frame_ptr,

  1026.     /* This function has no frame pointer.  */
  1027.     prologue_sans_frame_ptr,

  1029.     /* This function sets up the stack, so its frame is the first
  1030.        frame on the stack.  */
  1031.     prologue_first_frame

  1033.   } kind;

  1035.   /* If KIND is prologue_with_frame_ptr, this is the offset from the
  1036.      CFA to where the frame pointer points.  This is always zero or
  1037.      negative.  */
  1038.   LONGEST frame_ptr_offset;

  1040.   /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
  1041.      the stack pointer --- always zero or negative.

  1043.      Calling this a "size" is a bit misleading, but given that the
  1044.      stack grows downwards, using offsets for everything keeps one
  1045.      from going completely sign-crazy: you never change anything's
  1046.      sign for an ADD instruction; always change the second operand's
  1047.      sign for a SUB instruction; and everything takes care of
  1048.      itself.

  1050.      Functions that use alloca don't have a constant frame size.  But
  1051.      they always have frame pointers, so we must use that to find the
  1052.      CFA (and perhaps to unwind the stack pointer).  */
  1053.   LONGEST frame_size;

  1055.   /* The address of the first instruction at which the frame has been
  1056.      set up and the arguments are where the debug info says they are
  1057.      --- as best as we can tell.  */
  1058.   CORE_ADDR prologue_end;

  1060.   /* reg_offset[R] is the offset from the CFA at which register R is
  1061.      saved, or 1 if register R has not been saved.  (Real values are
  1062.      always zero or negative.)  */
  1063.   LONGEST reg_offset[M32C_MAX_NUM_REGS];
  1064. };


  1067. /* The longest I've seen, anyway.  */
  1068. ‌#define M32C_MAX_INSN_LEN (9)

  1070. /* Processor state, for the prologue analyzer.  */
  1071. ‌struct m32c_pv_state
  1072. {
  1073.   struct gdbarch *arch;
  1074.   pv_t r0, r1, r2, r3;
  1075.   pv_t a0, a1;
  1076.   pv_t sb, fb, sp;
  1077.   pv_t pc;
  1078.   struct pv_area *stack;

  1080.   /* Bytes from the current PC, the address they were read from,
  1081.      and the address of the next unconsumed byte.  */
  1082.   gdb_byte insn[M32C_MAX_INSN_LEN];
  1083.   CORE_ADDR scan_pc, next_addr;
  1084. };


  1087. /* Push VALUE on STATE's stack, occupying SIZE bytes.  Return zero if
  1088.    all went well, or non-zero if simulating the action would trash our
  1089.    state.  */
  1090. static int
  1091. ‌m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size)
  1092. {
  1093.   if (pv_area_store_would_trash (state->stack, state->sp))
  1094.     return 1;

  1096.   state->sp = pv_add_constant (state->sp, -size);
  1097.   pv_area_store (state->stack, state->sp, size, value);

  1099.   return 0;
  1100. }


  1103. /* A source or destination location for an m16c or m32c
  1104.    instruction.  */
  1105. ‌struct srcdest
  1106. {
  1107.   /* If srcdest_reg, the location is a register pointed to by REG.
  1108.      If srcdest_partial_reg, the location is part of a register pointed
  1109.      to by REG.  We don't try to handle this too well.
  1110.      If srcdest_mem, the location is memory whose address is ADDR.  */
  1111.   enum { srcdest_reg, srcdest_partial_reg, srcdest_mem } kind;
  1112.   pv_t *reg, addr;
  1113. };


  1116. /* Return the SIZE-byte value at LOC in STATE.  */
  1117. static pv_t
  1118. ‌m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size)
  1119. {
  1120.   if (loc.kind == srcdest_mem)
  1121.     return pv_area_fetch (state->stack, loc.addr, size);
  1122.   else if (loc.kind == srcdest_partial_reg)
  1123.     return pv_unknown ();
  1124.   else
  1125.     return *loc.reg;
  1126. }


  1129. /* Write VALUE, a SIZE-byte value, to LOC in STATE.  Return zero if
  1130.    all went well, or non-zero if simulating the store would trash our
  1131.    state.  */
  1132. static int
  1133. ‌m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc,
  1134.                     pv_t value, int size)
  1135. {
  1136.   if (loc.kind == srcdest_mem)
  1137.     {
  1138.       if (pv_area_store_would_trash (state->stack, loc.addr))
  1139.         return 1;
  1140.       pv_area_store (state->stack, loc.addr, size, value);
  1141.     }
  1142.   else if (loc.kind == srcdest_partial_reg)
  1143.     *loc.reg = pv_unknown ();
  1144.   else
  1145.     *loc.reg = value;

  1147.   return 0;
  1148. }


  1151. static int
  1152. ‌m32c_sign_ext (int v, int bits)
  1153. {
  1154.   int mask = 1 << (bits - 1);
  1155.   return (v ^ mask) - mask;
  1156. }

  1158. static unsigned int
  1159. ‌m32c_next_byte (struct m32c_pv_state *st)
  1160. {
  1161.   gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
  1162.   return st->insn[st->next_addr++ - st->scan_pc];
  1163. }

  1165. static int
  1166. ‌m32c_udisp8 (struct m32c_pv_state *st)
  1167. {
  1168.   return m32c_next_byte (st);
  1169. }


  1172. static int
  1173. ‌m32c_sdisp8 (struct m32c_pv_state *st)
  1174. {
  1175.   return m32c_sign_ext (m32c_next_byte (st), 8);
  1176. }


  1179. static int
  1180. ‌m32c_udisp16 (struct m32c_pv_state *st)
  1181. {
  1182.   int low  = m32c_next_byte (st);
  1183.   int high = m32c_next_byte (st);

  1185.   return low + (high << 8);
  1186. }


  1189. static int
  1190. ‌m32c_sdisp16 (struct m32c_pv_state *st)
  1191. {
  1192.   int low  = m32c_next_byte (st);
  1193.   int high = m32c_next_byte (st);

  1195.   return m32c_sign_ext (low + (high << 8), 16);
  1196. }


  1199. static int
  1200. ‌m32c_udisp24 (struct m32c_pv_state *st)
  1201. {
  1202.   int low  = m32c_next_byte (st);
  1203.   int mid  = m32c_next_byte (st);
  1204.   int high = m32c_next_byte (st);

  1206.   return low + (mid << 8) + (high << 16);
  1207. }


  1210. /* Extract the 'source' field from an m32c MOV.size:G-format instruction.  */
  1211. static int
  1212. ‌m32c_get_src23 (unsigned char *i)
  1213. {
  1214.   return (((i[0] & 0x70) >> 2)
  1215.           | ((i[1] & 0x30) >> 4));
  1216. }


  1219. /* Extract the 'dest' field from an m32c MOV.size:G-format instruction.  */
  1220. static int
  1221. ‌m32c_get_dest23 (unsigned char *i)
  1222. {
  1223.   return (((i[0] & 0x0e) << 1)
  1224.           | ((i[1] & 0xc0) >> 6));
  1225. }


  1228. static struct srcdest
  1229. ‌m32c_decode_srcdest4 (struct m32c_pv_state *st,
  1230.                       int code, int size)
  1231. {
  1232.   struct srcdest sd;

  1234.   if (code < 6)
  1235.     sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
  1236.   else
  1237.     sd.kind = srcdest_mem;

  1239.   sd.addr = pv_unknown ();
  1240.   sd.reg = 0;

  1242.   switch (code)
  1243.     {
  1244.     case 0x0: sd.reg = (size == 1 ? &st->r0 : &st->r0); break;
  1245.     case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
  1246.     case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
  1247.     case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;

  1249.     case 0x4: sd.reg = &st->a0; break;
  1250.     case 0x5: sd.reg = &st->a1; break;

  1252.     case 0x6: sd.addr = st->a0; break;
  1253.     case 0x7: sd.addr = st->a1; break;

  1255.     case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
  1256.     case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
  1257.     case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
  1258.     case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;

  1260.     case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
  1261.     case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
  1262.     case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
  1263.     case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;

  1265.     default:
  1266.       gdb_assert_not_reached ("unexpected srcdest4");
  1267.     }

  1269.   return sd;
  1270. }


  1273. static struct srcdest
  1274. ‌m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
  1275. {
  1276.   struct srcdest sd;

  1278.   sd.addr = pv_unknown ();
  1279.   sd.reg = 0;

  1281.   switch (code)
  1282.     {
  1283.     case 0x12:
  1284.     case 0x13:
  1285.     case 0x10:
  1286.     case 0x11:
  1287.       sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
  1288.       break;

  1290.     case 0x02:
  1291.     case 0x03:
  1292.       sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
  1293.       break;

  1295.     default:
  1296.       sd.kind = srcdest_mem;
  1297.       break;

  1299.     }

  1301.   switch (code)
  1302.     {
  1303.     case 0x12: sd.reg = &st->r0; break;
  1304.     case 0x13: sd.reg = &st->r1; break;
  1305.     case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
  1306.     case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
  1307.     case 0x02: sd.reg = &st->a0; break;
  1308.     case 0x03: sd.reg = &st->a1; break;

  1310.     case 0x00: sd.addr = st->a0; break;
  1311.     case 0x01: sd.addr = st->a1; break;
  1312.     case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
  1313.     case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
  1314.     case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
  1315.     case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
  1316.     case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
  1317.     case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
  1318.     case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
  1319.     case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
  1320.     case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
  1321.     case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
  1322.     case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
  1323.     case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
  1324.     default:
  1325.       gdb_assert_not_reached ("unexpected sd23");
  1326.     }

  1328.   if (ind)
  1329.     {
  1330.       sd.addr = m32c_srcdest_fetch (st, sd, 4);
  1331.       sd.kind = srcdest_mem;
  1332.     }

  1334.   return sd;
  1335. }


  1338. /* The r16c and r32c machines have instructions with similar
  1339.    semantics, but completely different machine language encodings.  So
  1340.    we break out the semantics into their own functions, and leave
  1341.    machine-specific decoding in m32c_analyze_prologue.

  1343.    The following functions all expect their arguments already decoded,
  1344.    and they all return zero if analysis should continue past this
  1345.    instruction, or non-zero if analysis should stop.  */


  1348. /* Simulate an 'enter SIZE' instruction in STATE.  */
  1349. static int
  1350. ‌m32c_pv_enter (struct m32c_pv_state *state, int size)
  1351. {
  1352.   struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);

  1354.   /* If simulating this store would require us to forget
  1355.      everything we know about the stack frame in the name of
  1356.      accuracy, it would be better to just quit now.  */
  1357.   if (pv_area_store_would_trash (state->stack, state->sp))
  1358.     return 1;

  1360.   if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
  1361.     return 1;
  1362.   state->fb = state->sp;
  1363.   state->sp = pv_add_constant (state->sp, -size);

  1365.   return 0;
  1366. }


  1369. static int
  1370. ‌m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg,
  1371.                    int bit, int src, int size)
  1372. {
  1373.   if (bit & src)
  1374.     {
  1375.       if (m32c_pv_push (state, reg, size))
  1376.         return 1;
  1377.     }

  1379.   return 0;
  1380. }


  1383. /* Simulate a 'pushm SRC' instruction in STATE.  */
  1384. static int
  1385. ‌m32c_pv_pushm (struct m32c_pv_state *state, int src)
  1386. {
  1387.   struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);

  1389.   /* The bits in SRC indicating which registers to save are:
  1390.      r0 r1 r2 r3 a0 a1 sb fb */
  1391.   return
  1392.     (   m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
  1393.      || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
  1394.      || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
  1395.      || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
  1396.      || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
  1397.      || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
  1398.      || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
  1399.      || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
  1400. }

  1402. /* Return non-zero if VALUE is the first incoming argument register.  */

  1404. static int
  1405. ‌m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value)
  1406. {
  1407.   struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
  1408.   return (value.kind == pvk_register
  1409.           && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
  1410.               ? (value.reg == tdep->r1->num)
  1411.               : (value.reg == tdep->r0->num))
  1412.           && value.k == 0);
  1413. }

  1415. /* Return non-zero if VALUE is an incoming argument register.  */

  1417. static int
  1418. ‌m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value)
  1419. {
  1420.   struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
  1421.   return (value.kind == pvk_register
  1422.           && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
  1423.               ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
  1424.               : (value.reg == tdep->r0->num))
  1425.           && value.k == 0);
  1426. }

  1428. /* Return non-zero if a store of VALUE to LOC is probably spilling an
  1429.    argument register to its stack slot in STATE.  Such instructions
  1430.    should be included in the prologue, if possible.

  1432.    The store is a spill if:
  1433.    - the value being stored is the original value of an argument register;
  1434.    - the value has not already been stored somewhere in STACK; and
  1435.    - LOC is a stack slot (e.g., a memory location whose address is
  1436.      relative to the original value of the SP).  */

  1438. static int
  1439. ‌m32c_is_arg_spill (struct m32c_pv_state *st,
  1440.                    struct srcdest loc,
  1441.                    pv_t value)
  1442. {
  1443.   struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);

  1445.   return (m32c_is_arg_reg (st, value)
  1446.           && loc.kind == srcdest_mem
  1447.           && pv_is_register (loc.addr, tdep->sp->num)
  1448.           && ! pv_area_find_reg (st->stack, st->arch, value.reg, 0));
  1449. }

  1451. /* Return non-zero if a store of VALUE to LOC is probably
  1452.    copying the struct return address into an address register
  1453.    for immediate use.  This is basically a "spill" into the
  1454.    address register, instead of onto the stack.

  1456.    The prerequisites are:
  1457.    - value being stored is original value of the FIRST arg register;
  1458.    - value has not already been stored on stack; and
  1459.    - LOC is an address register (a0 or a1).  */

  1461. static int
  1462. ‌m32c_is_struct_return (struct m32c_pv_state *st,
  1463.                        struct srcdest loc,
  1464.                        pv_t value)
  1465. {
  1466.   struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);

  1468.   return (m32c_is_1st_arg_reg (st, value)
  1469.           && !pv_area_find_reg (st->stack, st->arch, value.reg, 0)
  1470.           && loc.kind == srcdest_reg
  1471.           && (pv_is_register (*loc.reg, tdep->a0->num)
  1472.               || pv_is_register (*loc.reg, tdep->a1->num)));
  1473. }

  1475. /* Return non-zero if a 'pushm' saving the registers indicated by SRC
  1476.    was a register save:
  1477.    - all the named registers should have their original values, and
  1478.    - the stack pointer should be at a constant offset from the
  1479.      original stack pointer.  */
  1480. static int
  1481. ‌m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src)
  1482. {
  1483.   struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
  1484.   /* The bits in SRC indicating which registers to save are:
  1485.      r0 r1 r2 r3 a0 a1 sb fb */
  1486.   return
  1487.     (pv_is_register (st->sp, tdep->sp->num)
  1488.      && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
  1489.      && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
  1490.      && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
  1491.      && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
  1492.      && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
  1493.      && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
  1494.      && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
  1495.      && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
  1496. }


  1499. /* Function for finding saved registers in a 'struct pv_area'; we pass
  1500.    this to pv_area_scan.

  1502.    If VALUE is a saved register, ADDR says it was saved at a constant
  1503.    offset from the frame base, and SIZE indicates that the whole
  1504.    register was saved, record its offset in RESULT_UNTYPED.  */
  1505. static void
  1506. ‌check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
  1507. {
  1508.   struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
  1509.   struct gdbarch *arch = prologue->arch;
  1510.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);

  1512.   /* Is this the unchanged value of some register being saved on the
  1513.      stack?  */
  1514.   if (value.kind == pvk_register
  1515.       && value.k == 0
  1516.       && pv_is_register (addr, tdep->sp->num))
  1517.     {
  1518.       /* Some registers require special handling: they're saved as a
  1519.          larger value than the register itself.  */
  1520.       CORE_ADDR saved_size = register_size (arch, value.reg);

  1522.       if (value.reg == tdep->pc->num)
  1523.         saved_size = tdep->ret_addr_bytes;
  1524.       else if (register_type (arch, value.reg)
  1525.                == tdep->data_addr_reg_type)
  1526.         saved_size = tdep->push_addr_bytes;

  1528.       if (size == saved_size)
  1529.         {
  1530.           /* Find which end of the saved value corresponds to our
  1531.              register.  */
  1532.           if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
  1533.             prologue->reg_offset[value.reg]
  1534.               = (addr.k + saved_size - register_size (arch, value.reg));
  1535.           else
  1536.             prologue->reg_offset[value.reg] = addr.k;
  1537.         }
  1538.     }
  1539. }


  1542. /* Analyze the function prologue for ARCH at START, going no further
  1543.    than LIMIT, and place a description of what we found in
  1544.    PROLOGUE.  */
  1545. static void
  1546. ‌m32c_analyze_prologue (struct gdbarch *arch,
  1547.                        CORE_ADDR start, CORE_ADDR limit,
  1548.                        struct m32c_prologue *prologue)
  1549. {
  1550.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  1551.   unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
  1552.   CORE_ADDR after_last_frame_related_insn;
  1553.   struct cleanup *back_to;
  1554.   struct m32c_pv_state st;

  1556.   st.arch = arch;
  1557.   st.r0 = pv_register (tdep->r0->num, 0);
  1558.   st.r1 = pv_register (tdep->r1->num, 0);
  1559.   st.r2 = pv_register (tdep->r2->num, 0);
  1560.   st.r3 = pv_register (tdep->r3->num, 0);
  1561.   st.a0 = pv_register (tdep->a0->num, 0);
  1562.   st.a1 = pv_register (tdep->a1->num, 0);
  1563.   st.sb = pv_register (tdep->sb->num, 0);
  1564.   st.fb = pv_register (tdep->fb->num, 0);
  1565.   st.sp = pv_register (tdep->sp->num, 0);
  1566.   st.pc = pv_register (tdep->pc->num, 0);
  1567.   st.stack = make_pv_area (tdep->sp->num, gdbarch_addr_bit (arch));
  1568.   back_to = make_cleanup_free_pv_area (st.stack);

  1570.   /* Record that the call instruction has saved the return address on
  1571.      the stack.  */
  1572.   m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);

  1574.   memset (prologue, 0, sizeof (*prologue));
  1575.   prologue->arch = arch;
  1576.   {
  1577.     int i;
  1578.     for (i = 0; i < M32C_MAX_NUM_REGS; i++)
  1579.       prologue->reg_offset[i] = 1;
  1580.   }

  1582.   st.scan_pc = after_last_frame_related_insn = start;

  1584.   while (st.scan_pc < limit)
  1585.     {
  1586.       pv_t pre_insn_fb = st.fb;
  1587.       pv_t pre_insn_sp = st.sp;

  1589.       /* In theory we could get in trouble by trying to read ahead
  1590.          here, when we only know we're expecting one byte.  In
  1591.          practice I doubt anyone will care, and it makes the rest of
  1592.          the code easier.  */
  1593.       if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
  1594.         /* If we can't fetch the instruction from memory, stop here
  1595.            and hope for the best.  */
  1596.         break;
  1597.       st.next_addr = st.scan_pc;

  1599.       /* The assembly instructions are written as they appear in the
  1600.          section of the processor manuals that describe the
  1601.          instruction encodings.

  1603.          When a single assembly language instruction has several
  1604.          different machine-language encodings, the manual
  1605.          distinguishes them by a number in parens, before the
  1606.          mnemonic.  Those numbers are included, as well.

  1608.          The srcdest decoding instructions have the same names as the
  1609.          analogous functions in the simulator.  */
  1610.       if (mach == bfd_mach_m16c)
  1611.         {
  1612.           /* (1) ENTER #imm8 */
  1613.           if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
  1614.             {
  1615.               if (m32c_pv_enter (&st, st.insn[2]))
  1616.                 break;
  1617.               st.next_addr += 3;
  1618.             }
  1619.           /* (1) PUSHM src */
  1620.           else if (st.insn[0] == 0xec)
  1621.             {
  1622.               int src = st.insn[1];
  1623.               if (m32c_pv_pushm (&st, src))
  1624.                 break;
  1625.               st.next_addr += 2;

  1627.               if (m32c_pushm_is_reg_save (&st, src))
  1628.                 after_last_frame_related_insn = st.next_addr;
  1629.             }

  1631.           /* (6) MOV.size:G src, dest */
  1632.           else if ((st.insn[0] & 0xfe) == 0x72)
  1633.             {
  1634.               int size = (st.insn[0] & 0x01) ? 2 : 1;
  1635.               struct srcdest src;
  1636.               struct srcdest dest;
  1637.               pv_t src_value;
  1638.               st.next_addr += 2;

  1640.               src
  1641.                 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
  1642.               dest
  1643.                 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
  1644.               src_value = m32c_srcdest_fetch (&st, src, size);

  1646.               if (m32c_is_arg_spill (&st, dest, src_value))
  1647.                 after_last_frame_related_insn = st.next_addr;
  1648.               else if (m32c_is_struct_return (&st, dest, src_value))
  1649.                 after_last_frame_related_insn = st.next_addr;

  1651.               if (m32c_srcdest_store (&st, dest, src_value, size))
  1652.                 break;
  1653.             }

  1655.           /* (1) LDC #IMM16, sp */
  1656.           else if (st.insn[0] == 0xeb
  1657.                    && st.insn[1] == 0x50)
  1658.             {
  1659.               st.next_addr += 2;
  1660.               st.sp = pv_constant (m32c_udisp16 (&st));
  1661.             }

  1663.           else
  1664.             /* We've hit some instruction we don't know how to simulate.
  1665.                Strictly speaking, we should set every value we're
  1666.                tracking to "unknown".  But we'll be optimistic, assume
  1667.                that we have enough information already, and stop
  1668.                analysis here.  */
  1669.             break;
  1670.         }
  1671.       else
  1672.         {
  1673.           int src_indirect = 0;
  1674.           int dest_indirect = 0;
  1675.           int i = 0;

  1677.           gdb_assert (mach == bfd_mach_m32c);

  1679.           /* Check for prefix bytes indicating indirect addressing.  */
  1680.           if (st.insn[0] == 0x41)
  1681.             {
  1682.               src_indirect = 1;
  1683.               i++;
  1684.             }
  1685.           else if (st.insn[0] == 0x09)
  1686.             {
  1687.               dest_indirect = 1;
  1688.               i++;
  1689.             }
  1690.           else if (st.insn[0] == 0x49)
  1691.             {
  1692.               src_indirect = dest_indirect = 1;
  1693.               i++;
  1694.             }

  1696.           /* (1) ENTER #imm8 */
  1697.           if (st.insn[i] == 0xec)
  1698.             {
  1699.               if (m32c_pv_enter (&st, st.insn[i + 1]))
  1700.                 break;
  1701.               st.next_addr += 2;
  1702.             }

  1704.           /* (1) PUSHM src */
  1705.           else if (st.insn[i] == 0x8f)
  1706.             {
  1707.               int src = st.insn[i + 1];
  1708.               if (m32c_pv_pushm (&st, src))
  1709.                 break;
  1710.               st.next_addr += 2;

  1712.               if (m32c_pushm_is_reg_save (&st, src))
  1713.                 after_last_frame_related_insn = st.next_addr;
  1714.             }

  1716.           /* (7) MOV.size:G src, dest */
  1717.           else if ((st.insn[i] & 0x80) == 0x80
  1718.                    && (st.insn[i + 1] & 0x0f) == 0x0b
  1719.                    && m32c_get_src23 (&st.insn[i]) < 20
  1720.                    && m32c_get_dest23 (&st.insn[i]) < 20)
  1721.             {
  1722.               struct srcdest src;
  1723.               struct srcdest dest;
  1724.               pv_t src_value;
  1725.               int bw = st.insn[i] & 0x01;
  1726.               int size = bw ? 2 : 1;
  1727.               st.next_addr += 2;

  1729.               src
  1730.                 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
  1731.                                     size, src_indirect);
  1732.               dest
  1733.                 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
  1734.                                     size, dest_indirect);
  1735.               src_value = m32c_srcdest_fetch (&st, src, size);

  1737.               if (m32c_is_arg_spill (&st, dest, src_value))
  1738.                 after_last_frame_related_insn = st.next_addr;

  1740.               if (m32c_srcdest_store (&st, dest, src_value, size))
  1741.                 break;
  1742.             }
  1743.           /* (2) LDC #IMM24, sp */
  1744.           else if (st.insn[i] == 0xd5
  1745.                    && st.insn[i + 1] == 0x29)
  1746.             {
  1747.               st.next_addr += 2;
  1748.               st.sp = pv_constant (m32c_udisp24 (&st));
  1749.             }
  1750.           else
  1751.             /* We've hit some instruction we don't know how to simulate.
  1752.                Strictly speaking, we should set every value we're
  1753.                tracking to "unknown".  But we'll be optimistic, assume
  1754.                that we have enough information already, and stop
  1755.                analysis here.  */
  1756.             break;
  1757.         }

  1759.       /* If this instruction changed the FB or decreased the SP (i.e.,
  1760.          allocated more stack space), then this may be a good place to
  1761.          declare the prologue finished.  However, there are some
  1762.          exceptions:

  1764.          - If the instruction just changed the FB back to its original
  1765.            value, then that's probably a restore instruction.  The
  1766.            prologue should definitely end before that.

  1768.          - If the instruction increased the value of the SP (that is,
  1769.            shrunk the frame), then it's probably part of a frame
  1770.            teardown sequence, and the prologue should end before
  1771.            that.  */

  1773.       if (! pv_is_identical (st.fb, pre_insn_fb))
  1774.         {
  1775.           if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
  1776.             after_last_frame_related_insn = st.next_addr;
  1777.         }
  1778.       else if (! pv_is_identical (st.sp, pre_insn_sp))
  1779.         {
  1780.           /* The comparison of the constants looks odd, there, because
  1781.              .k is unsigned.  All it really means is that the SP is
  1782.              lower than it was before the instruction.  */
  1783.           if (   pv_is_register (pre_insn_sp, tdep->sp->num)
  1784.               && pv_is_register (st.sp,       tdep->sp->num)
  1785.               && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
  1786.             after_last_frame_related_insn = st.next_addr;
  1787.         }

  1789.       st.scan_pc = st.next_addr;
  1790.     }

  1792.   /* Did we load a constant value into the stack pointer?  */
  1793.   if (pv_is_constant (st.sp))
  1794.     prologue->kind = prologue_first_frame;

  1796.   /* Alternatively, did we initialize the frame pointer?  Remember
  1797.      that the CFA is the address after the return address.  */
  1798.   if (pv_is_register (st.fb, tdep->sp->num))
  1799.     {
  1800.       prologue->kind = prologue_with_frame_ptr;
  1801.       prologue->frame_ptr_offset = st.fb.k;
  1802.     }

  1804.   /* Is the frame size a known constant?  Remember that frame_size is
  1805.      actually the offset from the CFA to the SP (i.e., a negative
  1806.      value).  */
  1807.   else if (pv_is_register (st.sp, tdep->sp->num))
  1808.     {
  1809.       prologue->kind = prologue_sans_frame_ptr;
  1810.       prologue->frame_size = st.sp.k;
  1811.     }

  1813.   /* We haven't been able to make sense of this function's frame.  Treat
  1814.      it as the first frame.  */
  1815.   else
  1816.     prologue->kind = prologue_first_frame;

  1818.   /* Record where all the registers were saved.  */
  1819.   pv_area_scan (st.stack, check_for_saved, (void *) prologue);

  1821.   prologue->prologue_end = after_last_frame_related_insn;

  1823.   do_cleanups (back_to);
  1824. }


  1827. static CORE_ADDR
  1828. ‌m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
  1829. {
  1830.   const char *name;
  1831.   CORE_ADDR func_addr, func_end, sal_end;
  1832.   struct m32c_prologue p;

  1834.   /* Try to find the extent of the function that contains IP.  */
  1835.   if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
  1836.     return ip;

  1838.   /* Find end by prologue analysis.  */
  1839.   m32c_analyze_prologue (gdbarch, ip, func_end, &p);
  1840.   /* Find end by line info.  */
  1841.   sal_end = skip_prologue_using_sal (gdbarch, ip);
  1842.   /* Return whichever is lower.  */
  1843.   if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
  1844.     return sal_end;
  1845.   else
  1846.     return p.prologue_end;
  1847. }



  1851. /* Stack unwinding.  */

  1853. static struct m32c_prologue *
  1854. ‌m32c_analyze_frame_prologue (struct frame_info *this_frame,
  1855.                              void **this_prologue_cache)
  1856. {
  1857.   if (! *this_prologue_cache)
  1858.     {
  1859.       CORE_ADDR func_start = get_frame_func (this_frame);
  1860.       CORE_ADDR stop_addr = get_frame_pc (this_frame);

  1862.       /* If we couldn't find any function containing the PC, then
  1863.          just initialize the prologue cache, but don't do anything.  */
  1864.       if (! func_start)
  1865.         stop_addr = func_start;

  1867.       *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
  1868.       m32c_analyze_prologue (get_frame_arch (this_frame),
  1869.                              func_start, stop_addr, *this_prologue_cache);
  1870.     }

  1872.   return *this_prologue_cache;
  1873. }


  1876. static CORE_ADDR
  1877. ‌m32c_frame_base (struct frame_info *this_frame,
  1878.                 void **this_prologue_cache)
  1879. {
  1880.   struct m32c_prologue *p
  1881.     = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
  1882.   struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));

  1884.   /* In functions that use alloca, the distance between the stack
  1885.      pointer and the frame base varies dynamically, so we can't use
  1886.      the SP plus static information like prologue analysis to find the
  1887.      frame base.  However, such functions must have a frame pointer,
  1888.      to be able to restore the SP on exit.  So whenever we do have a
  1889.      frame pointer, use that to find the base.  */
  1890.   switch (p->kind)
  1891.     {
  1892.     case prologue_with_frame_ptr:
  1893.       {
  1894.         CORE_ADDR fb
  1895.           = get_frame_register_unsigned (this_frame, tdep->fb->num);
  1896.         return fb - p->frame_ptr_offset;
  1897.       }

  1899.     case prologue_sans_frame_ptr:
  1900.       {
  1901.         CORE_ADDR sp
  1902.           = get_frame_register_unsigned (this_frame, tdep->sp->num);
  1903.         return sp - p->frame_size;
  1904.       }

  1906.     case prologue_first_frame:
  1907.       return 0;

  1909.     default:
  1910.       gdb_assert_not_reached ("unexpected prologue kind");
  1911.     }
  1912. }


  1915. static void
  1916. ‌m32c_this_id (struct frame_info *this_frame,
  1917.               void **this_prologue_cache,
  1918.               struct frame_id *this_id)
  1919. {
  1920.   CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);

  1922.   if (base)
  1923.     *this_id = frame_id_build (base, get_frame_func (this_frame));
  1924.   /* Otherwise, leave it unset, and that will terminate the backtrace.  */
  1925. }


  1928. static struct value *
  1929. ‌m32c_prev_register (struct frame_info *this_frame,
  1930.                     void **this_prologue_cache, int regnum)
  1931. {
  1932.   struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
  1933.   struct m32c_prologue *p
  1934.     = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
  1935.   CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
  1936.   int reg_size = register_size (get_frame_arch (this_frame), regnum);

  1938.   if (regnum == tdep->sp->num)
  1939.     return frame_unwind_got_constant (this_frame, regnum, frame_base);

  1941.   /* If prologue analysis says we saved this register somewhere,
  1942.      return a description of the stack slot holding it.  */
  1943.   if (p->reg_offset[regnum] != 1)
  1944.     return frame_unwind_got_memory (this_frame, regnum,
  1945.                                     frame_base + p->reg_offset[regnum]);

  1947.   /* Otherwise, presume we haven't changed the value of this
  1948.      register, and get it from the next frame.  */
  1949.   return frame_unwind_got_register (this_frame, regnum, regnum);
  1950. }


  1953. ‌static const struct frame_unwind m32c_unwind = {
  1954.   NORMAL_FRAME,
  1955.   default_frame_unwind_stop_reason,
  1956.   m32c_this_id,
  1957.   m32c_prev_register,
  1958.   NULL,
  1959.   default_frame_sniffer
  1960. };


  1963. static CORE_ADDR
  1964. ‌m32c_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
  1965. {
  1966.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  1967.   return frame_unwind_register_unsigned (next_frame, tdep->pc->num);
  1968. }


  1971. static CORE_ADDR
  1972. ‌m32c_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
  1973. {
  1974.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
  1975.   return frame_unwind_register_unsigned (next_frame, tdep->sp->num);
  1976. }


  1979. /* Inferior calls.  */

  1981. /* The calling conventions, according to GCC:

  1983.    r8c, m16c
  1984.    ---------
  1985.    First arg may be passed in r1l or r1 if it (1) fits (QImode or
  1986.    HImode), (2) is named, and (3) is an integer or pointer type (no
  1987.    structs, floats, etc).  Otherwise, it's passed on the stack.

  1989.    Second arg may be passed in r2, same restrictions (but not QImode),
  1990.    even if the first arg is passed on the stack.

  1992.    Third and further args are passed on the stack.  No padding is
  1993.    used, stack "alignment" is 8 bits.

  1995.    m32cm, m32c
  1996.    -----------

  1998.    First arg may be passed in r0l or r0, same restrictions as above.

  2000.    Second and further args are passed on the stack.  Padding is used
  2001.    after QImode parameters (i.e. lower-addressed byte is the value,
  2002.    higher-addressed byte is the padding), stack "alignment" is 16
  2003.    bits.  */


  2006. /* Return true if TYPE is a type that can be passed in registers.  (We
  2007.    ignore the size, and pay attention only to the type code;
  2008.    acceptable sizes depends on which register is being considered to
  2009.    hold it.)  */
  2010. static int
  2011. ‌m32c_reg_arg_type (struct type *type)
  2012. {
  2013.   enum type_code code = TYPE_CODE (type);

  2015.   return (code == TYPE_CODE_INT
  2016.           || code == TYPE_CODE_ENUM
  2017.           || code == TYPE_CODE_PTR
  2018.           || code == TYPE_CODE_REF
  2019.           || code == TYPE_CODE_BOOL
  2020.           || code == TYPE_CODE_CHAR);
  2021. }


  2024. static CORE_ADDR
  2025. ‌m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
  2026.                       struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
  2027.                       struct value **args, CORE_ADDR sp, int struct_return,
  2028.                       CORE_ADDR struct_addr)
  2029. {
  2030.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  2031.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  2032.   unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
  2033.   CORE_ADDR cfa;
  2034.   int i;

  2036.   /* The number of arguments given in this function's prototype, or
  2037.      zero if it has a non-prototyped function type.  The m32c ABI
  2038.      passes arguments mentioned in the prototype differently from
  2039.      those in the ellipsis of a varargs function, or from those passed
  2040.      to a non-prototyped function.  */
  2041.   int num_prototyped_args = 0;

  2043.   {
  2044.     struct type *func_type = value_type (function);

  2046.     /* Dereference function pointer types.  */
  2047.     if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
  2048.       func_type = TYPE_TARGET_TYPE (func_type);

  2050.     gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC ||
  2051.                 TYPE_CODE (func_type) == TYPE_CODE_METHOD);

  2053. #if 0
  2054.     /* The ABI description in gcc/config/m32c/m32c.abi says that
  2055.        we need to handle prototyped and non-prototyped functions
  2056.        separately, but the code in GCC doesn't actually do so.  */
  2057.     if (TYPE_PROTOTYPED (func_type))
  2058. #endif
  2059.       num_prototyped_args = TYPE_NFIELDS (func_type);
  2060.   }

  2062.   /* First, if the function returns an aggregate by value, push a
  2063.      pointer to a buffer for it.  This doesn't affect the way
  2064.      subsequent arguments are allocated to registers.  */
  2065.   if (struct_return)
  2066.     {
  2067.       int ptr_len = TYPE_LENGTH (tdep->ptr_voyd);
  2068.       sp -= ptr_len;
  2069.       write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
  2070.     }

  2072.   /* Push the arguments.  */
  2073.   for (i = nargs - 1; i >= 0; i--)
  2074.     {
  2075.       struct value *arg = args[i];
  2076.       const gdb_byte *arg_bits = value_contents (arg);
  2077.       struct type *arg_type = value_type (arg);
  2078.       ULONGEST arg_size = TYPE_LENGTH (arg_type);

  2080.       /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)?  */
  2081.       if (i == 0
  2082.           && arg_size <= 2
  2083.           && i < num_prototyped_args
  2084.           && m32c_reg_arg_type (arg_type))
  2085.         {
  2086.           /* Extract and re-store as an integer as a terse way to make
  2087.              sure it ends up in the least significant end of r1.  (GDB
  2088.              should avoid assuming endianness, even on uni-endian
  2089.              processors.)  */
  2090.           ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
  2091.                                                  byte_order);
  2092.           struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
  2093.           regcache_cooked_write_unsigned (regcache, reg->num, u);
  2094.         }

  2096.       /* Can it go in r2?  */
  2097.       else if (mach == bfd_mach_m16c
  2098.                && i == 1
  2099.                && arg_size == 2
  2100.                && i < num_prototyped_args
  2101.                && m32c_reg_arg_type (arg_type))
  2102.         regcache_cooked_write (regcache, tdep->r2->num, arg_bits);

  2104.       /* Everything else goes on the stack.  */
  2105.       else
  2106.         {
  2107.           sp -= arg_size;

  2109.           /* Align the stack.  */
  2110.           if (mach == bfd_mach_m32c)
  2111.             sp &= ~1;

  2113.           write_memory (sp, arg_bits, arg_size);
  2114.         }
  2115.     }

  2117.   /* This is the CFA we use to identify the dummy frame.  */
  2118.   cfa = sp;

  2120.   /* Push the return address.  */
  2121.   sp -= tdep->ret_addr_bytes;
  2122.   write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
  2123.                                  bp_addr);

  2125.   /* Update the stack pointer.  */
  2126.   regcache_cooked_write_unsigned (regcache, tdep->sp->num, sp);

  2128.   /* We need to borrow an odd trick from the i386 target here.

  2130.      The value we return from this function gets used as the stack
  2131.      address (the CFA) for the dummy frame's ID.  The obvious thing is
  2132.      to return the new TOS.  However, that points at the return
  2133.      address, saved on the stack, which is inconsistent with the CFA's
  2134.      described by GCC's DWARF 2 .debug_frame information: DWARF 2
  2135.      .debug_frame info uses the address immediately after the saved
  2136.      return address.  So you end up with a dummy frame whose CFA
  2137.      points at the return address, but the frame for the function
  2138.      being called has a CFA pointing after the return address: the
  2139.      younger CFA is *greater than* the older CFA.  The sanity checks
  2140.      in frame.c don't like that.

  2142.      So we try to be consistent with the CFA's used by DWARF 2.
  2143.      Having a dummy frame and a real frame with the *same* CFA is
  2144.      tolerable.  */
  2145.   return cfa;
  2146. }


  2149. static struct frame_id
  2150. ‌m32c_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
  2151. {
  2152.   /* This needs to return a frame ID whose PC is the return address
  2153.      passed to m32c_push_dummy_call, and whose stack_addr is the SP
  2154.      m32c_push_dummy_call returned.

  2156.      m32c_unwind_sp gives us the CFA, which is the value the SP had
  2157.      before the return address was pushed.  */
  2158.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  2159.   CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num);
  2160.   return frame_id_build (sp, get_frame_pc (this_frame));
  2161. }



  2165. /* Return values.  */

  2167. /* Return value conventions, according to GCC:

  2169.    r8c, m16c
  2170.    ---------

  2172.    QImode in r0l
  2173.    HImode in r0
  2174.    SImode in r2r0
  2175.    near pointer in r0
  2176.    far pointer in r2r0

  2178.    Aggregate values (regardless of size) are returned by pushing a
  2179.    pointer to a temporary area on the stack after the args are pushed.
  2180.    The function fills in this area with the value.  Note that this
  2181.    pointer on the stack does not affect how register arguments, if any,
  2182.    are configured.

  2184.    m32cm, m32c
  2185.    -----------
  2186.    Same.  */

  2188. /* Return non-zero if values of type TYPE are returned by storing them
  2189.    in a buffer whose address is passed on the stack, ahead of the
  2190.    other arguments.  */
  2191. static int
  2192. ‌m32c_return_by_passed_buf (struct type *type)
  2193. {
  2194.   enum type_code code = TYPE_CODE (type);

  2196.   return (code == TYPE_CODE_STRUCT
  2197.           || code == TYPE_CODE_UNION);
  2198. }

  2200. static enum return_value_convention
  2201. ‌m32c_return_value (struct gdbarch *gdbarch,
  2202.                    struct value *function,
  2203.                    struct type *valtype,
  2204.                    struct regcache *regcache,
  2205.                    gdb_byte *readbuf,
  2206.                    const gdb_byte *writebuf)
  2207. {
  2208.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  2209.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  2210.   enum return_value_convention conv;
  2211.   ULONGEST valtype_len = TYPE_LENGTH (valtype);

  2213.   if (m32c_return_by_passed_buf (valtype))
  2214.     conv = RETURN_VALUE_STRUCT_CONVENTION;
  2215.   else
  2216.     conv = RETURN_VALUE_REGISTER_CONVENTION;

  2218.   if (readbuf)
  2219.     {
  2220.       /* We should never be called to find values being returned by
  2221.          RETURN_VALUE_STRUCT_CONVENTION.  Those can't be located,
  2222.          unless we made the call ourselves.  */
  2223.       gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);

  2225.       gdb_assert (valtype_len <= 8);

  2227.       /* Anything that fits in r0 is returned there.  */
  2228.       if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
  2229.         {
  2230.           ULONGEST u;
  2231.           regcache_cooked_read_unsigned (regcache, tdep->r0->num, &u);
  2232.           store_unsigned_integer (readbuf, valtype_len, byte_order, u);
  2233.         }
  2234.       else
  2235.         {
  2236.           /* Everything else is passed in mem0, using as many bytes as
  2237.              needed.  This is not what the Renesas tools do, but it's
  2238.              what GCC does at the moment.  */
  2239.           struct bound_minimal_symbol mem0
  2240.             = lookup_minimal_symbol ("mem0", NULL, NULL);

  2242.           if (! mem0.minsym)
  2243.             error (_("The return value is stored in memory at 'mem0', "
  2244.                      "but GDB cannot find\n"
  2245.                      "its address."));
  2246.           read_memory (BMSYMBOL_VALUE_ADDRESS (mem0), readbuf, valtype_len);
  2247.         }
  2248.     }

  2250.   if (writebuf)
  2251.     {
  2252.       /* We should never be called to store values to be returned
  2253.          using RETURN_VALUE_STRUCT_CONVENTION.  We have no way of
  2254.          finding the buffer, unless we made the call ourselves.  */
  2255.       gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);

  2257.       gdb_assert (valtype_len <= 8);

  2259.       /* Anything that fits in r0 is returned there.  */
  2260.       if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
  2261.         {
  2262.           ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
  2263.                                                  byte_order);
  2264.           regcache_cooked_write_unsigned (regcache, tdep->r0->num, u);
  2265.         }
  2266.       else
  2267.         {
  2268.           /* Everything else is passed in mem0, using as many bytes as
  2269.              needed.  This is not what the Renesas tools do, but it's
  2270.              what GCC does at the moment.  */
  2271.           struct bound_minimal_symbol mem0
  2272.             = lookup_minimal_symbol ("mem0", NULL, NULL);

  2274.           if (! mem0.minsym)
  2275.             error (_("The return value is stored in memory at 'mem0', "
  2276.                      "but GDB cannot find\n"
  2277.                      " its address."));
  2278.           write_memory (BMSYMBOL_VALUE_ADDRESS (mem0), writebuf, valtype_len);
  2279.         }
  2280.     }

  2282.   return conv;
  2283. }



  2287. /* Trampolines.  */

  2289. /* The m16c and m32c use a trampoline function for indirect function
  2290.    calls.  An indirect call looks like this:

  2292.              ... push arguments ...
  2293.              ... push target function address ...
  2294.              jsr.a m32c_jsri16

  2296.    The code for m32c_jsri16 looks like this:

  2298.      m32c_jsri16:

  2300.              # Save return address.
  2301.              pop.w        m32c_jsri_ret
  2302.              pop.b        m32c_jsri_ret+2

  2304.              # Store target function address.
  2305.              pop.w        m32c_jsri_addr

  2307.              # Re-push return address.
  2308.              push.b        m32c_jsri_ret+2
  2309.              push.w        m32c_jsri_ret

  2311.              # Call the target function.
  2312.              jmpi.a        m32c_jsri_addr

  2314.    Without further information, GDB will treat calls to m32c_jsri16
  2315.    like calls to any other function.  Since m32c_jsri16 doesn't have
  2316.    debugging information, that normally means that GDB sets a step-
  2317.    resume breakpoint and lets the program continue --- which is not
  2318.    what the user wanted.  (Giving the trampoline debugging info
  2319.    doesn't help: the user expects the program to stop in the function
  2320.    their program is calling, not in some trampoline code they've never
  2321.    seen before.)

  2323.    The gdbarch_skip_trampoline_code method tells GDB how to step
  2324.    through such trampoline functions transparently to the user.  When
  2325.    given the address of a trampoline function's first instruction,
  2326.    gdbarch_skip_trampoline_code should return the address of the first
  2327.    instruction of the function really being called.  If GDB decides it
  2328.    wants to step into that function, it will set a breakpoint there
  2329.    and silently continue to it.

  2331.    We recognize the trampoline by name, and extract the target address
  2332.    directly from the stack.  This isn't great, but recognizing by its
  2333.    code sequence seems more fragile.  */

  2335. static CORE_ADDR
  2336. ‌m32c_skip_trampoline_code (struct frame_info *frame, CORE_ADDR stop_pc)
  2337. {
  2338.   struct gdbarch *gdbarch = get_frame_arch (frame);
  2339.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
  2340.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);

  2342.   /* It would be nicer to simply look up the addresses of known
  2343.      trampolines once, and then compare stop_pc with them.  However,
  2344.      we'd need to ensure that that cached address got invalidated when
  2345.      someone loaded a new executable, and I'm not quite sure of the
  2346.      best way to do that.  find_pc_partial_function does do some
  2347.      caching, so we'll see how this goes.  */
  2348.   const char *name;
  2349.   CORE_ADDR start, end;

  2351.   if (find_pc_partial_function (stop_pc, &name, &start, &end))
  2352.     {
  2353.       /* Are we stopped at the beginning of the trampoline function?  */
  2354.       if (strcmp (name, "m32c_jsri16") == 0
  2355.           && stop_pc == start)
  2356.         {
  2357.           /* Get the stack pointer.  The return address is at the top,
  2358.              and the target function's address is just below that.  We
  2359.              know it's a two-byte address, since the trampoline is
  2360.              m32c_jsri*16*.  */
  2361.           CORE_ADDR sp = get_frame_sp (get_current_frame ());
  2362.           CORE_ADDR target
  2363.             = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes,
  2364.                                             2, byte_order);

  2366.           /* What we have now is the address of a jump instruction.
  2367.              What we need is the destination of that jump.
  2368.              The opcode is 1 byte, and the destination is the next 3 bytes.  */

  2370.           target = read_memory_unsigned_integer (target + 1, 3, byte_order);
  2371.           return target;
  2372.         }
  2373.     }

  2375.   return 0;
  2376. }


  2379. /* Address/pointer conversions.  */

  2381. /* On the m16c, there is a 24-bit address space, but only a very few
  2382.    instructions can generate addresses larger than 0xffff: jumps,
  2383.    jumps to subroutines, and the lde/std (load/store extended)
  2384.    instructions.

  2386.    Since GCC can only support one size of pointer, we can't have
  2387.    distinct 'near' and 'far' pointer types; we have to pick one size
  2388.    for everything.  If we wanted to use 24-bit pointers, then GCC
  2389.    would have to use lde and ste for all memory references, which
  2390.    would be terrible for performance and code size.  So the GNU
  2391.    toolchain uses 16-bit pointers for everything, and gives up the
  2392.    ability to have pointers point outside the first 64k of memory.

  2394.    However, as a special hack, we let the linker place functions at
  2395.    addresses above 0xffff, as long as it also places a trampoline in
  2396.    the low 64k for every function whose address is taken.  Each
  2397.    trampoline consists of a single jmp.a instruction that jumps to the
  2398.    function's real entry point.  Pointers to functions can be 16 bits
  2399.    long, even though the functions themselves are at higher addresses:
  2400.    the pointers refer to the trampolines, not the functions.

  2402.    This complicates things for GDB, however: given the address of a
  2403.    function (from debug info or linker symbols, say) which could be
  2404.    anywhere in the 24-bit address space, how can we find an
  2405.    appropriate 16-bit value to use as a pointer to it?

  2407.    If the linker has not generated a trampoline for the function,
  2408.    we're out of luck.  Well, I guess we could malloc some space and
  2409.    write a jmp.a instruction to it, but I'm not going to get into that
  2410.    at the moment.

  2412.    If the linker has generated a trampoline for the function, then it
  2413.    also emitted a symbol for the trampoline: if the function's linker
  2414.    symbol is named NAME, then the function's trampoline's linker
  2415.    symbol is named NAME.plt.

  2417.    So, given a code address:
  2418.    - We try to find a linker symbol at that address.
  2419.    - If we find such a symbol named NAME, we look for a linker symbol
  2420.      named NAME.plt.
  2421.    - If we find such a symbol, we assume it is a trampoline, and use
  2422.      its address as the pointer value.

  2424.    And, given a function pointer:
  2425.    - We try to find a linker symbol at that address named NAME.plt.
  2426.    - If we find such a symbol, we look for a linker symbol named NAME.
  2427.    - If we find that, we provide that as the function's address.
  2428.    - If any of the above steps fail, we return the original address
  2429.      unchanged; it might really be a function in the low 64k.

  2431.    See?  You *knew* there was a reason you wanted to be a computer
  2432.    programmer!  :)  */

  2434. static void
  2435. ‌m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
  2436.                               struct type *type, gdb_byte *buf, CORE_ADDR addr)
  2437. {
  2438.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  2439.   enum type_code target_code;
  2440.   gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
  2441.               TYPE_CODE (type) == TYPE_CODE_REF);

  2443.   target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));

  2445.   if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
  2446.     {
  2447.       const char *func_name;
  2448.       char *tramp_name;
  2449.       struct bound_minimal_symbol tramp_msym;

  2451.       /* Try to find a linker symbol at this address.  */
  2452.       struct bound_minimal_symbol func_msym
  2453.         = lookup_minimal_symbol_by_pc (addr);

  2455.       if (! func_msym.minsym)
  2456.         error (_("Cannot convert code address %s to function pointer:\n"
  2457.                "couldn't find a symbol at that address, to find trampoline."),
  2458.                paddress (gdbarch, addr));

  2460.       func_name = MSYMBOL_LINKAGE_NAME (func_msym.minsym);
  2461.       tramp_name = xmalloc (strlen (func_name) + 5);
  2462.       strcpy (tramp_name, func_name);
  2463.       strcat (tramp_name, ".plt");

  2465.       /* Try to find a linker symbol for the trampoline.  */
  2466.       tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);

  2468.       /* We've either got another copy of the name now, or don't need
  2469.          the name any more.  */
  2470.       xfree (tramp_name);

  2472.       if (! tramp_msym.minsym)
  2473.         {
  2474.           CORE_ADDR ptrval;

  2476.           /* No PLT entry found.  Mask off the upper bits of the address
  2477.              to make a pointer.  As noted in the warning to the user
  2478.              below, this value might be useful if converted back into
  2479.              an address by GDB, but will otherwise, almost certainly,
  2480.              be garbage.

  2482.              Using this masked result does seem to be useful
  2483.              in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
  2484.              PASSes.  These results appear to be correct as well.

  2486.              We print a warning here so that the user can make a
  2487.              determination about whether the result is useful or not.  */
  2488.           ptrval = addr & 0xffff;

  2490.           warning (_("Cannot convert code address %s to function pointer:\n"
  2491.                    "couldn't find trampoline named '%s.plt'.\n"
  2492.                    "Returning pointer value %s instead; this may produce\n"
  2493.                    "a useful result if converted back into an address by GDB,\n"
  2494.                    "but will most likely not be useful otherwise.\n"),
  2495.                    paddress (gdbarch, addr), func_name,
  2496.                    paddress (gdbarch, ptrval));

  2498.           addr = ptrval;

  2500.         }
  2501.       else
  2502.         {
  2503.           /* The trampoline's address is our pointer.  */
  2504.           addr = BMSYMBOL_VALUE_ADDRESS (tramp_msym);
  2505.         }
  2506.     }

  2508.   store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
  2509. }


  2512. static CORE_ADDR
  2513. ‌m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
  2514.                               struct type *type, const gdb_byte *buf)
  2515. {
  2516.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  2517.   CORE_ADDR ptr;
  2518.   enum type_code target_code;

  2520.   gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
  2521.               TYPE_CODE (type) == TYPE_CODE_REF);

  2523.   ptr = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);

  2525.   target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));

  2527.   if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
  2528.     {
  2529.       /* See if there is a minimal symbol at that address whose name is
  2530.          "NAME.plt".  */
  2531.       struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);

  2533.       if (ptr_msym.minsym)
  2534.         {
  2535.           const char *ptr_msym_name = MSYMBOL_LINKAGE_NAME (ptr_msym.minsym);
  2536.           int len = strlen (ptr_msym_name);

  2538.           if (len > 4
  2539.               && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
  2540.             {
  2541.               struct bound_minimal_symbol func_msym;
  2542.               /* We have a .plt symbol; try to find the symbol for the
  2543.                  corresponding function.

  2545.                  Since the trampoline contains a jump instruction, we
  2546.                  could also just extract the jump's target address.  I
  2547.                  don't see much advantage one way or the other.  */
  2548.               char *func_name = xmalloc (len - 4 + 1);
  2549.               memcpy (func_name, ptr_msym_name, len - 4);
  2550.               func_name[len - 4] = '\0';
  2551.               func_msym
  2552.                 = lookup_minimal_symbol (func_name, NULL, NULL);

  2554.               /* If we do have such a symbol, return its value as the
  2555.                  function's true address.  */
  2556.               if (func_msym.minsym)
  2557.                 ptr = BMSYMBOL_VALUE_ADDRESS (func_msym);
  2558.             }
  2559.         }
  2560.       else
  2561.         {
  2562.           int aspace;

  2564.           for (aspace = 1; aspace <= 15; aspace++)
  2565.             {
  2566.               ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);

  2568.               if (ptr_msym.minsym)
  2569.                 ptr |= aspace << 16;
  2570.             }
  2571.         }
  2572.     }

  2574.   return ptr;
  2575. }

  2577. static void
  2578. ‌m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
  2579.                             int *frame_regnum,
  2580.                             LONGEST *frame_offset)
  2581. {
  2582.   const char *name;
  2583.   CORE_ADDR func_addr, func_end;
  2584.   struct m32c_prologue p;

  2586.   struct regcache *regcache = get_current_regcache ();
  2587.   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

  2589.   if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
  2590.     internal_error (__FILE__, __LINE__,
  2591.                     _("No virtual frame pointer available"));

  2593.   m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
  2594.   switch (p.kind)
  2595.     {
  2596.     case prologue_with_frame_ptr:
  2597.       *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
  2598.       *frame_offset = p.frame_ptr_offset;
  2599.       break;
  2600.     case prologue_sans_frame_ptr:
  2601.       *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
  2602.       *frame_offset = p.frame_size;
  2603.       break;
  2604.     default:
  2605.       *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
  2606.       *frame_offset = 0;
  2607.       break;
  2608.     }
  2609.   /* Sanity check */
  2610.   if (*frame_regnum > gdbarch_num_regs (gdbarch))
  2611.     internal_error (__FILE__, __LINE__,
  2612.                     _("No virtual frame pointer available"));
  2613. }


  2616. /* Initialization.  */

  2618. static struct gdbarch *
  2619. ‌m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  2620. {
  2621.   struct gdbarch *arch;
  2622.   struct gdbarch_tdep *tdep;
  2623.   unsigned long mach = info.bfd_arch_info->mach;

  2625.   /* Find a candidate among the list of architectures we've created
  2626.      already.  */
  2627.   for (arches = gdbarch_list_lookup_by_info (arches, &info);
  2628.        arches != NULL;
  2629.        arches = gdbarch_list_lookup_by_info (arches->next, &info))
  2630.     return arches->gdbarch;

  2632.   tdep = xcalloc (1, sizeof (*tdep));
  2633.   arch = gdbarch_alloc (&info, tdep);

  2635.   /* Essential types.  */
  2636.   make_types (arch);

  2638.   /* Address/pointer conversions.  */
  2639.   if (mach == bfd_mach_m16c)
  2640.     {
  2641.       set_gdbarch_address_to_pointer (arch, m32c_m16c_address_to_pointer);
  2642.       set_gdbarch_pointer_to_address (arch, m32c_m16c_pointer_to_address);
  2643.     }

  2645.   /* Register set.  */
  2646.   make_regs (arch);

  2648.   /* Disassembly.  */
  2649.   set_gdbarch_print_insn (arch, print_insn_m32c);

  2651.   /* Breakpoints.  */
  2652.   set_gdbarch_breakpoint_from_pc (arch, m32c_breakpoint_from_pc);

  2654.   /* Prologue analysis and unwinding.  */
  2655.   set_gdbarch_inner_than (arch, core_addr_lessthan);
  2656.   set_gdbarch_skip_prologue (arch, m32c_skip_prologue);
  2657.   set_gdbarch_unwind_pc (arch, m32c_unwind_pc);
  2658.   set_gdbarch_unwind_sp (arch, m32c_unwind_sp);
  2659. #if 0
  2660.   /* I'm dropping the dwarf2 sniffer because it has a few problems.
  2661.      They may be in the dwarf2 cfi code in GDB, or they may be in
  2662.      the debug info emitted by the upstream toolchain.  I don't
  2663.      know which, but I do know that the prologue analyzer works better.
  2664.      MVS 04/13/06  */
  2665.   dwarf2_append_sniffers (arch);
  2666. #endif
  2667.   frame_unwind_append_unwinder (arch, &m32c_unwind);

  2669.   /* Inferior calls.  */
  2670.   set_gdbarch_push_dummy_call (arch, m32c_push_dummy_call);
  2671.   set_gdbarch_return_value (arch, m32c_return_value);
  2672.   set_gdbarch_dummy_id (arch, m32c_dummy_id);

  2674.   /* Trampolines.  */
  2675.   set_gdbarch_skip_trampoline_code (arch, m32c_skip_trampoline_code);

  2677.   set_gdbarch_virtual_frame_pointer (arch, m32c_virtual_frame_pointer);

  2679.   /* m32c function boundary addresses are not necessarily even.
  2680.      Therefore, the `vbit', which indicates a pointer to a virtual
  2681.      member function, is stored in the delta field, rather than as
  2682.      the low bit of a function pointer address.

  2684.      In order to verify this, see the definition of
  2685.      TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
  2686.      definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h.  */
  2687.   set_gdbarch_vbit_in_delta (arch, 1);

  2689.   return arch;
  2690. }

  2692. /* Provide a prototype to silence -Wmissing-prototypes.  */
  2693. extern initialize_file_ftype _initialize_m32c_tdep;

  2695. void
  2696. ‌_initialize_m32c_tdep (void)
  2697. {
  2698.   register_gdbarch_init (bfd_arch_m32c, m32c_gdbarch_init);

  2700.   m32c_dma_reggroup = reggroup_new ("dma", USER_REGGROUP);
  2701. }