gdb/mt-tdep.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* Target-dependent code for Morpho mt processor, for GDB.

  3.    Copyright (C) 2005-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. /* Contributed by Michael Snyder, msnyder@redhat.com.  */

  22. #include "defs.h"
  23. #include "frame.h"
  24. #include "frame-unwind.h"
  25. #include "frame-base.h"
  26. #include "symtab.h"
  27. #include "dis-asm.h"
  28. #include "arch-utils.h"
  29. #include "gdbtypes.h"
  30. #include "regcache.h"
  31. #include "reggroups.h"
  32. #include "gdbcore.h"
  33. #include "trad-frame.h"
  34. #include "inferior.h"
  35. #include "dwarf2-frame.h"
  36. #include "infcall.h"
  37. #include "language.h"
  38. #include "valprint.h"

  40. ‌enum mt_arch_constants
  41. {
  42.   MT_MAX_STRUCT_SIZE = 16
  43. };

  45. ‌enum mt_gdb_regnums
  46. {
  47.   MT_R0_REGNUM,                        /* 32 bit regs.  */
  48.   MT_R1_REGNUM,
  49.   MT_1ST_ARGREG = MT_R1_REGNUM,
  50.   MT_R2_REGNUM,
  51.   MT_R3_REGNUM,
  52.   MT_R4_REGNUM,
  53.   MT_LAST_ARGREG = MT_R4_REGNUM,
  54.   MT_R5_REGNUM,
  55.   MT_R6_REGNUM,
  56.   MT_R7_REGNUM,
  57.   MT_R8_REGNUM,
  58.   MT_R9_REGNUM,
  59.   MT_R10_REGNUM,
  60.   MT_R11_REGNUM,
  61.   MT_R12_REGNUM,
  62.   MT_FP_REGNUM = MT_R12_REGNUM,
  63.   MT_R13_REGNUM,
  64.   MT_SP_REGNUM = MT_R13_REGNUM,
  65.   MT_R14_REGNUM,
  66.   MT_RA_REGNUM = MT_R14_REGNUM,
  67.   MT_R15_REGNUM,
  68.   MT_IRA_REGNUM = MT_R15_REGNUM,
  69.   MT_PC_REGNUM,

  71.   /* Interrupt Enable pseudo-register, exported by SID.  */
  72.   MT_INT_ENABLE_REGNUM,
  73.   /* End of CPU regs.  */

  75.   MT_NUM_CPU_REGS,

  77.   /* Co-processor registers.  */
  78.   MT_COPRO_REGNUM = MT_NUM_CPU_REGS,        /* 16 bit regs.  */
  79.   MT_CPR0_REGNUM,
  80.   MT_CPR1_REGNUM,
  81.   MT_CPR2_REGNUM,
  82.   MT_CPR3_REGNUM,
  83.   MT_CPR4_REGNUM,
  84.   MT_CPR5_REGNUM,
  85.   MT_CPR6_REGNUM,
  86.   MT_CPR7_REGNUM,
  87.   MT_CPR8_REGNUM,
  88.   MT_CPR9_REGNUM,
  89.   MT_CPR10_REGNUM,
  90.   MT_CPR11_REGNUM,
  91.   MT_CPR12_REGNUM,
  92.   MT_CPR13_REGNUM,
  93.   MT_CPR14_REGNUM,
  94.   MT_CPR15_REGNUM,
  95.   MT_BYPA_REGNUM,                /* 32 bit regs.  */
  96.   MT_BYPB_REGNUM,
  97.   MT_BYPC_REGNUM,
  98.   MT_FLAG_REGNUM,
  99.   MT_CONTEXT_REGNUM,                /* 38 bits (treat as array of
  100.                                    six bytes).  */
  101.   MT_MAC_REGNUM,                        /* 32 bits.  */
  102.   MT_Z1_REGNUM,                        /* 16 bits.  */
  103.   MT_Z2_REGNUM,                        /* 16 bits.  */
  104.   MT_ICHANNEL_REGNUM,                /* 32 bits.  */
  105.   MT_ISCRAMB_REGNUM,                /* 32 bits.  */
  106.   MT_QSCRAMB_REGNUM,                /* 32 bits.  */
  107.   MT_OUT_REGNUM,                        /* 16 bits.  */
  108.   MT_EXMAC_REGNUM,                /* 32 bits (8 used).  */
  109.   MT_QCHANNEL_REGNUM,                /* 32 bits.  */
  110.   MT_ZI2_REGNUM,                /* 16 bits.  */
  111.   MT_ZQ2_REGNUM,                /* 16 bits.  */
  112.   MT_CHANNEL2_REGNUM,           /* 32 bits.  */
  113.   MT_ISCRAMB2_REGNUM,           /* 32 bits.  */
  114.   MT_QSCRAMB2_REGNUM,           /* 32 bits.  */
  115.   MT_QCHANNEL2_REGNUM,          /* 32 bits.  */

  117.   /* Number of real registers.  */
  118.   MT_NUM_REGS,

  120.   /* Pseudo-registers.  */
  121.   MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
  122.   MT_MAC_PSEUDOREG_REGNUM,
  123.   MT_COPRO_PSEUDOREG_ARRAY,

  125.   MT_COPRO_PSEUDOREG_DIM_1 = 2,
  126.   MT_COPRO_PSEUDOREG_DIM_2 = 8,
  127.   /* The number of pseudo-registers for each coprocessor.  These
  128.      include the real coprocessor registers, the pseudo-registe for
  129.      the coprocessor number, and the pseudo-register for the MAC.  */
  130.   MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2,
  131.   /* The register number of the MAC, relative to a given coprocessor.  */
  132.   MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1,

  134.   /* Two pseudo-regs ('coprocessor' and 'mac').  */
  135.   MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
  136.                             * MT_COPRO_PSEUDOREG_DIM_1
  137.                             * MT_COPRO_PSEUDOREG_DIM_2)
  138. };

  140. /* The tdep structure.  */
  141. ‌struct gdbarch_tdep
  142. {
  143.   /* ISA-specific types.  */
  144.   struct type *copro_type;
  145. };


  148. /* Return name of register number specified by REGNUM.  */

  150. static const char *
  151. ‌mt_register_name (struct gdbarch *gdbarch, int regnum)
  152. {
  153.   static const char *const register_names[] = {
  154.     /* CPU regs.  */
  155.     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  156.     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
  157.     "pc", "IE",
  158.     /* Co-processor regs.  */
  159.     "",                                /* copro register.  */
  160.     "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
  161.     "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
  162.     "bypa", "bypb", "bypc", "flag", "context", "" /* mac.  */ , "z1", "z2",
  163.     "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac.  */ , "Qchannel",
  164.     "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
  165.     /* Pseudo-registers.  */
  166.     "coprocessor", "MAC"
  167.   };
  168.   static const char *array_names[MT_COPRO_PSEUDOREG_REGS
  169.                                  * MT_COPRO_PSEUDOREG_DIM_1
  170.                                  * MT_COPRO_PSEUDOREG_DIM_2];

  172.   if (regnum < 0)
  173.     return "";
  174.   if (regnum < ARRAY_SIZE (register_names))
  175.     return register_names[regnum];
  176.   if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
  177.     return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];

  179.   {
  180.     char *name;
  181.     const char *stub;
  182.     unsigned dim_1;
  183.     unsigned dim_2;
  184.     unsigned index;

  186.     regnum -= MT_COPRO_PSEUDOREG_ARRAY;
  187.     index = regnum % MT_COPRO_PSEUDOREG_REGS;
  188.     dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
  189.     dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
  190.              %  MT_COPRO_PSEUDOREG_DIM_1);

  192.     if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
  193.       stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
  194.     else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM)
  195.       stub = "";
  196.     else
  197.       stub = register_names[index + MT_CPR0_REGNUM];
  198.     if (!*stub)
  199.       {
  200.         array_names[regnum] = stub;
  201.         return stub;
  202.       }
  203.     name = xmalloc (30);
  204.     sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
  205.     array_names[regnum] = name;
  206.     return name;
  207.   }
  208. }

  210. /* Return the type of a coprocessor register.  */

  212. static struct type *
  213. ‌mt_copro_register_type (struct gdbarch *arch, int regnum)
  214. {
  215.   switch (regnum)
  216.     {
  217.     case MT_INT_ENABLE_REGNUM:
  218.     case MT_ICHANNEL_REGNUM:
  219.     case MT_QCHANNEL_REGNUM:
  220.     case MT_ISCRAMB_REGNUM:
  221.     case MT_QSCRAMB_REGNUM:
  222.       return builtin_type (arch)->builtin_int32;
  223.     case MT_BYPA_REGNUM:
  224.     case MT_BYPB_REGNUM:
  225.     case MT_BYPC_REGNUM:
  226.     case MT_Z1_REGNUM:
  227.     case MT_Z2_REGNUM:
  228.     case MT_OUT_REGNUM:
  229.     case MT_ZI2_REGNUM:
  230.     case MT_ZQ2_REGNUM:
  231.       return builtin_type (arch)->builtin_int16;
  232.     case MT_EXMAC_REGNUM:
  233.     case MT_MAC_REGNUM:
  234.       return builtin_type (arch)->builtin_uint32;
  235.     case MT_CONTEXT_REGNUM:
  236.       return builtin_type (arch)->builtin_long_long;
  237.     case MT_FLAG_REGNUM:
  238.       return builtin_type (arch)->builtin_unsigned_char;
  239.     default:
  240.       if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
  241.         return builtin_type (arch)->builtin_int16;
  242.       else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM)
  243.         {
  244.           if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
  245.               || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
  246.             return builtin_type (arch)->builtin_uint64;
  247.           else
  248.             return builtin_type (arch)->builtin_uint32;
  249.         }
  250.       else
  251.         return builtin_type (arch)->builtin_uint32;
  252.     }
  253. }

  255. /* Given ARCH and a register number specified by REGNUM, return the
  256.    type of that register.  */

  258. static struct type *
  259. ‌mt_register_type (struct gdbarch *arch, int regnum)
  260. {
  261.   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);

  263.   if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS)
  264.     {
  265.       switch (regnum)
  266.         {
  267.         case MT_PC_REGNUM:
  268.         case MT_RA_REGNUM:
  269.         case MT_IRA_REGNUM:
  270.           return builtin_type (arch)->builtin_func_ptr;
  271.         case MT_SP_REGNUM:
  272.         case MT_FP_REGNUM:
  273.           return builtin_type (arch)->builtin_data_ptr;
  274.         case MT_COPRO_REGNUM:
  275.         case MT_COPRO_PSEUDOREG_REGNUM:
  276.           if (tdep->copro_type == NULL)
  277.             {
  278.               struct type *elt = builtin_type (arch)->builtin_int16;
  279.               tdep->copro_type = lookup_array_range_type (elt, 0, 1);
  280.             }
  281.           return tdep->copro_type;
  282.         case MT_MAC_PSEUDOREG_REGNUM:
  283.           return mt_copro_register_type (arch,
  284.                                          MT_CPR0_REGNUM
  285.                                          + MT_COPRO_PSEUDOREG_MAC_REGNUM);
  286.         default:
  287.           if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
  288.             return builtin_type (arch)->builtin_int32;
  289.           else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
  290.             return mt_copro_register_type (arch, regnum);
  291.           else
  292.             {
  293.               regnum -= MT_COPRO_PSEUDOREG_ARRAY;
  294.               regnum %= MT_COPRO_PSEUDOREG_REGS;
  295.               regnum += MT_CPR0_REGNUM;
  296.               return mt_copro_register_type (arch, regnum);
  297.             }
  298.         }
  299.     }
  300.   internal_error (__FILE__, __LINE__,
  301.                   _("mt_register_type: illegal register number %d"), regnum);
  302. }

  304. /* Return true if register REGNUM is a member of the register group
  305.    specified by GROUP.  */

  307. static int
  308. ‌mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
  309.                          struct reggroup *group)
  310. {
  311.   /* Groups of registers that can be displayed via "info reg".  */
  312.   if (group == all_reggroup)
  313.     return (regnum >= 0
  314.             && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
  315.             && mt_register_name (gdbarch, regnum)[0] != '\0');

  317.   if (group == general_reggroup)
  318.     return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);

  320.   if (group == float_reggroup)
  321.     return 0;                        /* No float regs.  */

  323.   if (group == vector_reggroup)
  324.     return 0;                        /* No vector regs.  */

  326.   /* For any that are not handled above.  */
  327.   return default_register_reggroup_p (gdbarch, regnum, group);
  328. }

  330. /* Return the return value convention used for a given type TYPE.
  331.    Optionally, fetch or set the return value via READBUF or
  332.    WRITEBUF respectively using REGCACHE for the register
  333.    values.  */

  335. static enum return_value_convention
  336. ‌mt_return_value (struct gdbarch *gdbarch, struct value *function,
  337.                  struct type *type, struct regcache *regcache,
  338.                  gdb_byte *readbuf, const gdb_byte *writebuf)
  339. {
  340.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);

  342.   if (TYPE_LENGTH (type) > 4)
  343.     {
  344.       /* Return values > 4 bytes are returned in memory,
  345.          pointed to by R11.  */
  346.       if (readbuf)
  347.         {
  348.           ULONGEST addr;

  350.           regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
  351.           read_memory (addr, readbuf, TYPE_LENGTH (type));
  352.         }

  354.       if (writebuf)
  355.         {
  356.           ULONGEST addr;

  358.           regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
  359.           write_memory (addr, writebuf, TYPE_LENGTH (type));
  360.         }

  362.       return RETURN_VALUE_ABI_RETURNS_ADDRESS;
  363.     }
  364.   else
  365.     {
  366.       if (readbuf)
  367.         {
  368.           ULONGEST temp;

  370.           /* Return values of <= 4 bytes are returned in R11.  */
  371.           regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp);
  372.           store_unsigned_integer (readbuf, TYPE_LENGTH (type),
  373.                                   byte_order, temp);
  374.         }

  376.       if (writebuf)
  377.         {
  378.           if (TYPE_LENGTH (type) < 4)
  379.             {
  380.               gdb_byte buf[4];
  381.               /* Add leading zeros to the value.  */
  382.               memset (buf, 0, sizeof (buf));
  383.               memcpy (buf + sizeof (buf) - TYPE_LENGTH (type),
  384.                       writebuf, TYPE_LENGTH (type));
  385.               regcache_cooked_write (regcache, MT_R11_REGNUM, buf);
  386.             }
  387.           else                        /* (TYPE_LENGTH (type) == 4 */
  388.             regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf);
  389.         }

  391.       return RETURN_VALUE_REGISTER_CONVENTION;
  392.     }
  393. }

  395. /* If the input address, PC, is in a function prologue, return the
  396.    address of the end of the prologue, otherwise return the input
  397.    address.

  399.    Note:  PC is likely to be the function start, since this function
  400.    is mainly used for advancing a breakpoint to the first line, or
  401.    stepping to the first line when we have stepped into a function
  402.    call.  */

  404. static CORE_ADDR
  405. ‌mt_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
  406. {
  407.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  408.   CORE_ADDR func_addr = 0, func_end = 0;
  409.   const char *func_name;
  410.   unsigned long instr;

  412.   if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
  413.     {
  414.       struct symtab_and_line sal;
  415.       struct symbol *sym;

  417.       /* Found a function.  */
  418.       sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL);
  419.       if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
  420.         {
  421.           /* Don't use this trick for assembly source files.  */
  422.           sal = find_pc_line (func_addr, 0);

  424.           if (sal.end && sal.end < func_end)
  425.             {
  426.               /* Found a line number, use it as end of prologue.  */
  427.               return sal.end;
  428.             }
  429.         }
  430.     }

  432.   /* No function symbol, or no line symbol.  Use prologue scanning method.  */
  433.   for (;; pc += 4)
  434.     {
  435.       instr = read_memory_unsigned_integer (pc, 4, byte_order);
  436.       if (instr == 0x12000000)        /* nop */
  437.         continue;
  438.       if (instr == 0x12ddc000)        /* copy sp into fp */
  439.         continue;
  440.       instr >>= 16;
  441.       if (instr == 0x05dd)        /* subi sp, sp, imm */
  442.         continue;
  443.       if (instr >= 0x43c0 && instr <= 0x43df)        /* push */
  444.         continue;
  445.       /* Not an obvious prologue instruction.  */
  446.       break;
  447.     }

  449.   return pc;
  450. }

  452. /* The breakpoint instruction must be the same size as the smallest
  453.    instruction in the instruction set.

  455.    The BP for ms1 is defined as 0x68000000 (BREAK).
  456.    The BP for ms2 is defined as 0x69000000 (illegal).  */

  458. static const gdb_byte *
  459. ‌mt_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
  460.                        int *bp_size)
  461. {
  462.   static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
  463.   static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };

  465.   *bp_size = 4;
  466.   if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  467.     return ms2_breakpoint;

  469.   return ms1_breakpoint;
  470. }

  472. /* Select the correct coprocessor register bank.  Return the pseudo
  473.    regnum we really want to read.  */

  475. static int
  476. ‌mt_select_coprocessor (struct gdbarch *gdbarch,
  477.                         struct regcache *regcache, int regno)
  478. {
  479.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  480.   unsigned index, base;
  481.   gdb_byte copro[4];

  483.   /* Get the copro pseudo regnum.  */
  484.   regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
  485.   base = ((extract_signed_integer (&copro[0], 2, byte_order)
  486.            * MT_COPRO_PSEUDOREG_DIM_2)
  487.           + extract_signed_integer (&copro[2], 2, byte_order));

  489.   regno -= MT_COPRO_PSEUDOREG_ARRAY;
  490.   index = regno % MT_COPRO_PSEUDOREG_REGS;
  491.   regno /= MT_COPRO_PSEUDOREG_REGS;
  492.   if (base != regno)
  493.     {
  494.       /* Select the correct coprocessor register bank.  Invalidate the
  495.          coprocessor register cache.  */
  496.       unsigned ix;

  498.       store_signed_integer (&copro[0], 2, byte_order,
  499.                             regno / MT_COPRO_PSEUDOREG_DIM_2);
  500.       store_signed_integer (&copro[2], 2, byte_order,
  501.                             regno % MT_COPRO_PSEUDOREG_DIM_2);
  502.       regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);

  504.       /* We must flush the cache, as it is now invalid.  */
  505.       for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
  506.         regcache_invalidate (regcache, ix);
  507.     }

  509.   return index;
  510. }

  512. /* Fetch the pseudo registers:

  514.    There are two regular pseudo-registers:
  515.    1) The 'coprocessor' pseudo-register (which mirrors the
  516.    "real" coprocessor register sent by the target), and
  517.    2) The 'MAC' pseudo-register (which represents the union
  518.    of the original 32 bit target MAC register and the new
  519.    8-bit extended-MAC register).

  521.    Additionally there is an array of coprocessor registers which track
  522.    the coprocessor registers for each coprocessor.  */

  524. static enum register_status
  525. ‌mt_pseudo_register_read (struct gdbarch *gdbarch,
  526.                          struct regcache *regcache, int regno, gdb_byte *buf)
  527. {
  528.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);

  530.   switch (regno)
  531.     {
  532.     case MT_COPRO_REGNUM:
  533.     case MT_COPRO_PSEUDOREG_REGNUM:
  534.       return regcache_raw_read (regcache, MT_COPRO_REGNUM, buf);
  535.     case MT_MAC_REGNUM:
  536.     case MT_MAC_PSEUDOREG_REGNUM:
  537.       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
  538.           || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  539.         {
  540.           enum register_status status;
  541.           ULONGEST oldmac = 0, ext_mac = 0;
  542.           ULONGEST newmac;

  544.           status = regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac);
  545.           if (status != REG_VALID)
  546.             return status;

  548.           regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac);
  549.           if (status != REG_VALID)
  550.             return status;

  552.           newmac =
  553.             (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32);
  554.           store_signed_integer (buf, 8, byte_order, newmac);

  556.           return REG_VALID;
  557.         }
  558.       else
  559.         return regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
  560.       break;
  561.     default:
  562.       {
  563.         unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);

  565.         if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
  566.           return mt_pseudo_register_read (gdbarch, regcache,
  567.                                           MT_MAC_PSEUDOREG_REGNUM, buf);
  568.         else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
  569.           return regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
  570.         else
  571.           /* ??? */
  572.           return REG_VALID;
  573.       }
  574.       break;
  575.     }
  576. }

  578. /* Write the pseudo registers:

  580.    Mt pseudo-registers are stored directly to the target.  The
  581.    'coprocessor' register is special, because when it is modified, all
  582.    the other coprocessor regs must be flushed from the reg cache.  */

  584. static void
  585. ‌mt_pseudo_register_write (struct gdbarch *gdbarch,
  586.                            struct regcache *regcache,
  587.                            int regno, const gdb_byte *buf)
  588. {
  589.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  590.   int i;

  592.   switch (regno)
  593.     {
  594.     case MT_COPRO_REGNUM:
  595.     case MT_COPRO_PSEUDOREG_REGNUM:
  596.       regcache_raw_write (regcache, MT_COPRO_REGNUM, buf);
  597.       for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++)
  598.         regcache_invalidate (regcache, i);
  599.       break;
  600.     case MT_MAC_REGNUM:
  601.     case MT_MAC_PSEUDOREG_REGNUM:
  602.       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
  603.           || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  604.         {
  605.           /* The 8-byte MAC pseudo-register must be broken down into two
  606.              32-byte registers.  */
  607.           unsigned int oldmac, ext_mac;
  608.           ULONGEST newmac;

  610.           newmac = extract_unsigned_integer (buf, 8, byte_order);
  611.           oldmac = newmac & 0xffffffff;
  612.           ext_mac = (newmac >> 32) & 0xff;
  613.           regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac);
  614.           regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac);
  615.         }
  616.       else
  617.         regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
  618.       break;
  619.     default:
  620.       {
  621.         unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);

  623.         if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
  624.           mt_pseudo_register_write (gdbarch, regcache,
  625.                                     MT_MAC_PSEUDOREG_REGNUM, buf);
  626.         else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
  627.           regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
  628.       }
  629.       break;
  630.     }
  631. }

  633. static CORE_ADDR
  634. ‌mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
  635. {
  636.   /* Register size is 4 bytes.  */
  637.   return align_down (sp, 4);
  638. }

  640. /* Implements the "info registers" command.   When ``all'' is non-zero,
  641.    the coprocessor registers will be printed in addition to the rest
  642.    of the registers.  */

  644. static void
  645. ‌mt_registers_info (struct gdbarch *gdbarch,
  646.                    struct ui_file *file,
  647.                    struct frame_info *frame, int regnum, int all)
  648. {
  649.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);

  651.   if (regnum == -1)
  652.     {
  653.       int lim;

  655.       lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS;

  657.       for (regnum = 0; regnum < lim; regnum++)
  658.         {
  659.           /* Don't display the Qchannel register since it will be displayed
  660.              along with Ichannel.  (See below.)  */
  661.           if (regnum == MT_QCHANNEL_REGNUM)
  662.             continue;

  664.           mt_registers_info (gdbarch, file, frame, regnum, all);

  666.           /* Display the Qchannel register immediately after Ichannel.  */
  667.           if (regnum == MT_ICHANNEL_REGNUM)
  668.             mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all);
  669.         }
  670.     }
  671.   else
  672.     {
  673.       if (regnum == MT_EXMAC_REGNUM)
  674.         return;
  675.       else if (regnum == MT_CONTEXT_REGNUM)
  676.         {
  677.           /* Special output handling for 38-bit context register.  */
  678.           unsigned char *buff;
  679.           unsigned int *bytes, i, regsize;

  681.           regsize = register_size (gdbarch, regnum);

  683.           buff = alloca (regsize);
  684.           bytes = alloca (regsize * sizeof (*bytes));

  686.           deprecated_frame_register_read (frame, regnum, buff);

  688.           fputs_filtered (gdbarch_register_name
  689.                           (gdbarch, regnum), file);
  690.           print_spaces_filtered (15 - strlen (gdbarch_register_name
  691.                                                 (gdbarch, regnum)),
  692.                                  file);
  693.           fputs_filtered ("0x", file);

  695.           for (i = 0; i < regsize; i++)
  696.             fprintf_filtered (file, "%02x", (unsigned int)
  697.                               extract_unsigned_integer (buff + i, 1, byte_order));
  698.           fputs_filtered ("\t", file);
  699.           print_longest (file, 'd', 0,
  700.                          extract_unsigned_integer (buff, regsize, byte_order));
  701.           fputs_filtered ("\n", file);
  702.         }
  703.       else if (regnum == MT_COPRO_REGNUM
  704.                || regnum == MT_COPRO_PSEUDOREG_REGNUM)
  705.         {
  706.           /* Special output handling for the 'coprocessor' register.  */
  707.           gdb_byte *buf;
  708.           struct value_print_options opts;

  710.           buf = alloca (register_size (gdbarch, MT_COPRO_REGNUM));
  711.           deprecated_frame_register_read (frame, MT_COPRO_REGNUM, buf);
  712.           /* And print.  */
  713.           regnum = MT_COPRO_PSEUDOREG_REGNUM;
  714.           fputs_filtered (gdbarch_register_name (gdbarch, regnum),
  715.                           file);
  716.           print_spaces_filtered (15 - strlen (gdbarch_register_name
  717.                                                 (gdbarch, regnum)),
  718.                                  file);
  719.           get_no_prettyformat_print_options (&opts);
  720.           opts.deref_ref = 1;
  721.           val_print (register_type (gdbarch, regnum), buf,
  722.                      0, 0, file, 0, NULL,
  723.                      &opts, current_language);
  724.           fputs_filtered ("\n", file);
  725.         }
  726.       else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM)
  727.         {
  728.           ULONGEST oldmac, ext_mac, newmac;
  729.           gdb_byte buf[3 * sizeof (LONGEST)];

  731.           /* Get the two "real" mac registers.  */
  732.           deprecated_frame_register_read (frame, MT_MAC_REGNUM, buf);
  733.           oldmac = extract_unsigned_integer
  734.             (buf, register_size (gdbarch, MT_MAC_REGNUM), byte_order);
  735.           if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
  736.               || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  737.             {
  738.               deprecated_frame_register_read (frame, MT_EXMAC_REGNUM, buf);
  739.               ext_mac = extract_unsigned_integer
  740.                 (buf, register_size (gdbarch, MT_EXMAC_REGNUM), byte_order);
  741.             }
  742.           else
  743.             ext_mac = 0;

  745.           /* Add them together.  */
  746.           newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32);

  748.           /* And print.  */
  749.           regnum = MT_MAC_PSEUDOREG_REGNUM;
  750.           fputs_filtered (gdbarch_register_name (gdbarch, regnum),
  751.                           file);
  752.           print_spaces_filtered (15 - strlen (gdbarch_register_name
  753.                                               (gdbarch, regnum)),
  754.                                  file);
  755.           fputs_filtered ("0x", file);
  756.           print_longest (file, 'x', 0, newmac);
  757.           fputs_filtered ("\t", file);
  758.           print_longest (file, 'u', 0, newmac);
  759.           fputs_filtered ("\n", file);
  760.         }
  761.       else
  762.         default_print_registers_info (gdbarch, file, frame, regnum, all);
  763.     }
  764. }

  766. /* Set up the callee's arguments for an inferior function call.  The
  767.    arguments are pushed on the stack or are placed in registers as
  768.    appropriate.  It also sets up the return address (which points to
  769.    the call dummy breakpoint).

  771.    Returns the updated (and aligned) stack pointer.  */

  773. static CORE_ADDR
  774. ‌mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
  775.                      struct regcache *regcache, CORE_ADDR bp_addr,
  776.                      int nargs, struct value **args, CORE_ADDR sp,
  777.                      int struct_return, CORE_ADDR struct_addr)
  778. {
  779. ‌#define wordsize 4
  780.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  781.   gdb_byte buf[MT_MAX_STRUCT_SIZE];
  782.   int argreg = MT_1ST_ARGREG;
  783.   int split_param_len = 0;
  784.   int stack_dest = sp;
  785.   int slacklen;
  786.   int typelen;
  787.   int i, j;

  789.   /* First handle however many args we can fit into MT_1ST_ARGREG thru
  790.      MT_LAST_ARGREG.  */
  791.   for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
  792.     {
  793.       const gdb_byte *val;
  794.       typelen = TYPE_LENGTH (value_type (args[i]));
  795.       switch (typelen)
  796.         {
  797.         case 1:
  798.         case 2:
  799.         case 3:
  800.         case 4:
  801.           regcache_cooked_write_unsigned (regcache, argreg++,
  802.                                           extract_unsigned_integer
  803.                                           (value_contents (args[i]),
  804.                                            wordsize, byte_order));
  805.           break;
  806.         case 8:
  807.         case 12:
  808.         case 16:
  809.           val = value_contents (args[i]);
  810.           while (typelen > 0)
  811.             {
  812.               if (argreg <= MT_LAST_ARGREG)
  813.                 {
  814.                   /* This word of the argument is passed in a register.  */
  815.                   regcache_cooked_write_unsigned (regcache, argreg++,
  816.                                                   extract_unsigned_integer
  817.                                                   (val, wordsize, byte_order));
  818.                   typelen -= wordsize;
  819.                   val += wordsize;
  820.                 }
  821.               else
  822.                 {
  823.                   /* Remainder of this arg must be passed on the stack
  824.                      (deferred to do later).  */
  825.                   split_param_len = typelen;
  826.                   memcpy (buf, val, typelen);
  827.                   break;        /* No more args can be handled in regs.  */
  828.                 }
  829.             }
  830.           break;
  831.         default:
  832.           /* By reverse engineering of gcc output, args bigger than
  833.              16 bytes go on the stack, and their address is passed
  834.              in the argreg.  */
  835.           stack_dest -= typelen;
  836.           write_memory (stack_dest, value_contents (args[i]), typelen);
  837.           regcache_cooked_write_unsigned (regcache, argreg++, stack_dest);
  838.           break;
  839.         }
  840.     }

  842.   /* Next, the rest of the arguments go onto the stack, in reverse order.  */
  843.   for (j = nargs - 1; j >= i; j--)
  844.     {
  845.       gdb_byte *val;
  846.       struct cleanup *back_to;
  847.       const gdb_byte *contents = value_contents (args[j]);

  849.       /* Right-justify the value in an aligned-length buffer.  */
  850.       typelen = TYPE_LENGTH (value_type (args[j]));
  851.       slacklen = (wordsize - (typelen % wordsize)) % wordsize;
  852.       val = xmalloc (typelen + slacklen);
  853.       back_to = make_cleanup (xfree, val);
  854.       memcpy (val, contents, typelen);
  855.       memset (val + typelen, 0, slacklen);
  856.       /* Now write this data to the stack.  */
  857.       stack_dest -= typelen + slacklen;
  858.       write_memory (stack_dest, val, typelen + slacklen);
  859.       do_cleanups (back_to);
  860.     }

  862.   /* Finally, if a param needs to be split between registers and stack,
  863.      write the second half to the stack now.  */
  864.   if (split_param_len != 0)
  865.     {
  866.       stack_dest -= split_param_len;
  867.       write_memory (stack_dest, buf, split_param_len);
  868.     }

  870.   /* Set up return address (provided to us as bp_addr).  */
  871.   regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr);

  873.   /* Store struct return address, if given.  */
  874.   if (struct_return && struct_addr != 0)
  875.     regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr);

  877.   /* Set aside 16 bytes for the callee to save regs 1-4.  */
  878.   stack_dest -= 16;

  880.   /* Update the stack pointer.  */
  881.   regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest);

  883.   /* And that should do it.  Return the new stack pointer.  */
  884.   return stack_dest;
  885. }


  888. /* The 'unwind_cache' data structure.  */

  890. ‌struct mt_unwind_cache
  891. {
  892.   /* The previous frame's inner most stack address.
  893.      Used as this frame ID's stack_addr.  */
  894.   CORE_ADDR prev_sp;
  895.   CORE_ADDR frame_base;
  896.   int framesize;
  897.   int frameless_p;

  899.   /* Table indicating the location of each and every register.  */
  900.   struct trad_frame_saved_reg *saved_regs;
  901. };

  903. /* Initialize an unwind_cache.  Build up the saved_regs table etc. for
  904.    the frame.  */

  906. static struct mt_unwind_cache *
  907. ‌mt_frame_unwind_cache (struct frame_info *this_frame,
  908.                         void **this_prologue_cache)
  909. {
  910.   struct gdbarch *gdbarch;
  911.   struct mt_unwind_cache *info;
  912.   CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr;
  913.   unsigned long instr, upper_half, delayed_store = 0;
  914.   int regnum, offset;
  915.   ULONGEST sp, fp;

  917.   if ((*this_prologue_cache))
  918.     return (*this_prologue_cache);

  920.   gdbarch = get_frame_arch (this_frame);
  921.   info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache);
  922.   (*this_prologue_cache) = info;

  924.   info->prev_sp = 0;
  925.   info->framesize = 0;
  926.   info->frame_base = 0;
  927.   info->frameless_p = 1;
  928.   info->saved_regs = trad_frame_alloc_saved_regs (this_frame);

  930.   /* Grab the frame-relative values of SP and FP, needed below.
  931.      The frame_saved_register function will find them on the
  932.      stack or in the registers as appropriate.  */
  933.   sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
  934.   fp = get_frame_register_unsigned (this_frame, MT_FP_REGNUM);

  936.   start_addr = get_frame_func (this_frame);

  938.   /* Return early if GDB couldn't find the function.  */
  939.   if (start_addr == 0)
  940.     return info;

  942.   end_addr = get_frame_pc (this_frame);
  943.   prologue_end_addr = skip_prologue_using_sal (gdbarch, start_addr);
  944.   if (end_addr == 0)
  945.   for (next_addr = start_addr; next_addr < end_addr; next_addr += 4)
  946.     {
  947.       instr = get_frame_memory_unsigned (this_frame, next_addr, 4);
  948.       if (delayed_store)        /* Previous instr was a push.  */
  949.         {
  950.           upper_half = delayed_store >> 16;
  951.           regnum = upper_half & 0xf;
  952.           offset = delayed_store & 0xffff;
  953.           switch (upper_half & 0xfff0)
  954.             {
  955.             case 0x43c0:        /* push using frame pointer.  */
  956.               info->saved_regs[regnum].addr = offset;
  957.               break;
  958.             case 0x43d0:        /* push using stack pointer.  */
  959.               info->saved_regs[regnum].addr = offset;
  960.               break;
  961.             default:                /* lint */
  962.               break;
  963.             }
  964.           delayed_store = 0;
  965.         }

  967.       switch (instr)
  968.         {
  969.         case 0x12000000:        /* NO-OP */
  970.           continue;
  971.         case 0x12ddc000:        /* copy sp into fp */
  972.           info->frameless_p = 0;        /* Record that the frame
  973.                                            pointer is in use.  */
  974.           continue;
  975.         default:
  976.           upper_half = instr >> 16;
  977.           if (upper_half == 0x05dd ||        /* subi  sp, sp, imm */
  978.               upper_half == 0x07dd)        /* subui sp, sp, imm */
  979.             {
  980.               /* Record the frame size.  */
  981.               info->framesize = instr & 0xffff;
  982.               continue;
  983.             }
  984.           if ((upper_half & 0xfff0) == 0x43c0 ||        /* frame push */
  985.               (upper_half & 0xfff0) == 0x43d0)        /* stack push */
  986.             {
  987.               /* Save this instruction, but don't record the
  988.                  pushed register as 'saved' until we see the
  989.                  next instruction.  That's because of deferred stores
  990.                  on this target -- GDB won't be able to read the register
  991.                  from the stack until one instruction later.  */
  992.               delayed_store = instr;
  993.               continue;
  994.             }
  995.           /* Not a prologue instruction.  Is this the end of the prologue?
  996.              This is the most difficult decision; when to stop scanning.

  998.              If we have no line symbol, then the best thing we can do
  999.              is to stop scanning when we encounter an instruction that
  1000.              is not likely to be a part of the prologue.

  1002.              But if we do have a line symbol, then we should
  1003.              keep scanning until we reach it (or we reach end_addr).  */

  1005.           if (prologue_end_addr && (prologue_end_addr > (next_addr + 4)))
  1006.             continue;        /* Keep scanning, recording saved_regs etc.  */
  1007.           else
  1008.             break;        /* Quit scanning: breakpoint can be set here.  */
  1009.         }
  1010.     }

  1012.   /* Special handling for the "saved" address of the SP:
  1013.      The SP is of course never saved on the stack at all, so
  1014.      by convention what we put here is simply the previous
  1015.      _value_ of the SP (as opposed to an address where the
  1016.      previous value would have been pushed).  This will also
  1017.      give us the frame base address.  */

  1019.   if (info->frameless_p)
  1020.     {
  1021.       info->frame_base = sp + info->framesize;
  1022.       info->prev_sp = sp + info->framesize;
  1023.     }
  1024.   else
  1025.     {
  1026.       info->frame_base = fp + info->framesize;
  1027.       info->prev_sp = fp + info->framesize;
  1028.     }
  1029.   /* Save prev_sp in saved_regs as a value, not as an address.  */
  1030.   trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp);

  1032.   /* Now convert frame offsets to actual addresses (not offsets).  */
  1033.   for (regnum = 0; regnum < MT_NUM_REGS; regnum++)
  1034.     if (trad_frame_addr_p (info->saved_regs, regnum))
  1035.       info->saved_regs[regnum].addr += info->frame_base - info->framesize;

  1037.   /* The call instruction moves the caller's PC in the callee's RA reg.
  1038.      Since this is an unwind, do the reverse.  Copy the location of RA
  1039.      into PC (the address / regnum) so that a request for PC will be
  1040.      converted into a request for the RA.  */
  1041.   info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM];

  1043.   return info;
  1044. }

  1046. static CORE_ADDR
  1047. ‌mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
  1048. {
  1049.   ULONGEST pc;

  1051.   pc = frame_unwind_register_unsigned (next_frame, MT_PC_REGNUM);
  1052.   return pc;
  1053. }

  1055. static CORE_ADDR
  1056. ‌mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
  1057. {
  1058.   ULONGEST sp;

  1060.   sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
  1061.   return sp;
  1062. }

  1064. /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
  1065.    frame.  The frame ID's base needs to match the TOS value saved by
  1066.    save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint.  */

  1068. static struct frame_id
  1069. ‌mt_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
  1070. {
  1071.   CORE_ADDR sp = get_frame_register_unsigned (this_frame, MT_SP_REGNUM);
  1072.   return frame_id_build (sp, get_frame_pc (this_frame));
  1073. }

  1075. /* Given a GDB frame, determine the address of the calling function's
  1076.    frame.  This will be used to create a new GDB frame struct.  */

  1078. static void
  1079. ‌mt_frame_this_id (struct frame_info *this_frame,
  1080.                    void **this_prologue_cache, struct frame_id *this_id)
  1081. {
  1082.   struct mt_unwind_cache *info =
  1083.     mt_frame_unwind_cache (this_frame, this_prologue_cache);

  1085.   if (!(info == NULL || info->prev_sp == 0))
  1086.     (*this_id) = frame_id_build (info->prev_sp, get_frame_func (this_frame));

  1088.   return;
  1089. }

  1091. static struct value *
  1092. ‌mt_frame_prev_register (struct frame_info *this_frame,
  1093.                          void **this_prologue_cache, int regnum)
  1094. {
  1095.   struct mt_unwind_cache *info =
  1096.     mt_frame_unwind_cache (this_frame, this_prologue_cache);

  1098.   return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
  1099. }

  1101. static CORE_ADDR
  1102. ‌mt_frame_base_address (struct frame_info *this_frame,
  1103.                         void **this_prologue_cache)
  1104. {
  1105.   struct mt_unwind_cache *info =
  1106.     mt_frame_unwind_cache (this_frame, this_prologue_cache);

  1108.   return info->frame_base;
  1109. }

  1111. /* This is a shared interface:  the 'frame_unwind' object is what's
  1112.    returned by the 'sniffer' function, and in turn specifies how to
  1113.    get a frame's ID and prev_regs.

  1115.    This exports the 'prev_register' and 'this_id' methods.  */

  1117. ‌static const struct frame_unwind mt_frame_unwind = {
  1118.   NORMAL_FRAME,
  1119.   default_frame_unwind_stop_reason,
  1120.   mt_frame_this_id,
  1121.   mt_frame_prev_register,
  1122.   NULL,
  1123.   default_frame_sniffer
  1124. };

  1126. /* Another shared interface:  the 'frame_base' object specifies how to
  1127.    unwind a frame and secure the base addresses for frame objects
  1128.    (locals, args).  */

  1130. ‌static struct frame_base mt_frame_base = {
  1131.   &mt_frame_unwind,
  1132.   mt_frame_base_address,
  1133.   mt_frame_base_address,
  1134.   mt_frame_base_address
  1135. };

  1137. static struct gdbarch *
  1138. ‌mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  1139. {
  1140.   struct gdbarch *gdbarch;
  1141.   struct gdbarch_tdep *tdep;

  1143.   /* Find a candidate among the list of pre-declared architectures.  */
  1144.   arches = gdbarch_list_lookup_by_info (arches, &info);
  1145.   if (arches != NULL)
  1146.     return arches->gdbarch;

  1148.   /* None found, create a new architecture from the information
  1149.      provided.  */
  1150.   tdep = XCNEW (struct gdbarch_tdep);
  1151.   gdbarch = gdbarch_alloc (&info, tdep);

  1153.   set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
  1154.   set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
  1155.   set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);

  1157.   set_gdbarch_register_name (gdbarch, mt_register_name);
  1158.   set_gdbarch_num_regs (gdbarch, MT_NUM_REGS);
  1159.   set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS);
  1160.   set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM);
  1161.   set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
  1162.   set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read);
  1163.   set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write);
  1164.   set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue);
  1165.   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
  1166.   set_gdbarch_breakpoint_from_pc (gdbarch, mt_breakpoint_from_pc);
  1167.   set_gdbarch_decr_pc_after_break (gdbarch, 0);
  1168.   set_gdbarch_frame_args_skip (gdbarch, 0);
  1169.   set_gdbarch_print_insn (gdbarch, print_insn_mt);
  1170.   set_gdbarch_register_type (gdbarch, mt_register_type);
  1171.   set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);

  1173.   set_gdbarch_return_value (gdbarch, mt_return_value);
  1174.   set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);

  1176.   set_gdbarch_frame_align (gdbarch, mt_frame_align);

  1178.   set_gdbarch_print_registers_info (gdbarch, mt_registers_info);

  1180.   set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call);

  1182.   /* Target builtin data types.  */
  1183.   set_gdbarch_short_bit (gdbarch, 16);
  1184.   set_gdbarch_int_bit (gdbarch, 32);
  1185.   set_gdbarch_long_bit (gdbarch, 32);
  1186.   set_gdbarch_long_long_bit (gdbarch, 64);
  1187.   set_gdbarch_float_bit (gdbarch, 32);
  1188.   set_gdbarch_double_bit (gdbarch, 64);
  1189.   set_gdbarch_long_double_bit (gdbarch, 64);
  1190.   set_gdbarch_ptr_bit (gdbarch, 32);

  1192.   /* Register the DWARF 2 sniffer first, and then the traditional prologue
  1193.      based sniffer.  */
  1194.   dwarf2_append_unwinders (gdbarch);
  1195.   frame_unwind_append_unwinder (gdbarch, &mt_frame_unwind);
  1196.   frame_base_set_default (gdbarch, &mt_frame_base);

  1198.   /* Register the 'unwind_pc' method.  */
  1199.   set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc);
  1200.   set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp);

  1202.   /* Methods for saving / extracting a dummy frame's ID.
  1203.      The ID's stack address must match the SP value returned by
  1204.      PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos.  */
  1205.   set_gdbarch_dummy_id (gdbarch, mt_dummy_id);

  1207.   return gdbarch;
  1208. }

  1210. /* Provide a prototype to silence -Wmissing-prototypes.  */
  1211. extern initialize_file_ftype _initialize_mt_tdep;

  1213. void
  1214. ‌_initialize_mt_tdep (void)
  1215. {
  1216.   register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init);
  1217. }