gdb/tilegx-tdep.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* Target-dependent code for the Tilera TILE-Gx processor.

  3.    Copyright (C) 2012-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. #include "defs.h"
  21. #include "frame.h"
  22. #include "frame-base.h"
  23. #include "frame-unwind.h"
  24. #include "dwarf2-frame.h"
  25. #include "trad-frame.h"
  26. #include "symtab.h"
  27. #include "gdbtypes.h"
  28. #include "gdbcmd.h"
  29. #include "gdbcore.h"
  30. #include "value.h"
  31. #include "dis-asm.h"
  32. #include "inferior.h"
  33. #include "arch-utils.h"
  34. #include "floatformat.h"
  35. #include "regcache.h"
  36. #include "regset.h"
  37. #include "doublest.h"
  38. #include "osabi.h"
  39. #include "linux-tdep.h"
  40. #include "objfiles.h"
  41. #include "solib-svr4.h"
  42. #include "tilegx-tdep.h"
  43. #include "opcode/tilegx.h"

  45. ‌struct tilegx_frame_cache
  46. {
  47.   /* Base address.  */
  48.   CORE_ADDR base;
  49.   /* Function start.  */
  50.   CORE_ADDR start_pc;

  52.   /* Table of saved registers.  */
  53.   struct trad_frame_saved_reg *saved_regs;
  54. };

  56. /* Register state values used by analyze_prologue.  */
  57. ‌enum reverse_state
  58.   {
  59.     REVERSE_STATE_REGISTER,
  60.     REVERSE_STATE_VALUE,
  61.     REVERSE_STATE_UNKNOWN
  62.   };

  64. /* Register state used by analyze_prologue().  */
  65. ‌struct tilegx_reverse_regs
  66. {
  67.   LONGEST value;
  68.   enum reverse_state state;
  69. };

  71. static const struct tilegx_reverse_regs
  72. ‌template_reverse_regs[TILEGX_NUM_PHYS_REGS] =
  73.   {
  74.     { TILEGX_R0_REGNUM,  REVERSE_STATE_REGISTER },
  75.     { TILEGX_R1_REGNUM,  REVERSE_STATE_REGISTER },
  76.     { TILEGX_R2_REGNUM,  REVERSE_STATE_REGISTER },
  77.     { TILEGX_R3_REGNUM,  REVERSE_STATE_REGISTER },
  78.     { TILEGX_R4_REGNUM,  REVERSE_STATE_REGISTER },
  79.     { TILEGX_R5_REGNUM,  REVERSE_STATE_REGISTER },
  80.     { TILEGX_R6_REGNUM,  REVERSE_STATE_REGISTER },
  81.     { TILEGX_R7_REGNUM,  REVERSE_STATE_REGISTER },
  82.     { TILEGX_R8_REGNUM,  REVERSE_STATE_REGISTER },
  83.     { TILEGX_R9_REGNUM,  REVERSE_STATE_REGISTER },
  84.     { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER },
  85.     { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER },
  86.     { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER },
  87.     { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER },
  88.     { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER },
  89.     { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER },
  90.     { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER },
  91.     { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER },
  92.     { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER },
  93.     { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER },
  94.     { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER },
  95.     { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER },
  96.     { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER },
  97.     { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER },
  98.     { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER },
  99.     { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER },
  100.     { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER },
  101.     { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER },
  102.     { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER },
  103.     { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER },
  104.     { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER },
  105.     { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER },
  106.     { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER },
  107.     { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER },
  108.     { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER },
  109.     { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER },
  110.     { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER },
  111.     { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER },
  112.     { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER },
  113.     { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER },
  114.     { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER },
  115.     { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER },
  116.     { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER },
  117.     { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER },
  118.     { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER },
  119.     { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER },
  120.     { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER },
  121.     { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER },
  122.     { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER },
  123.     { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER },
  124.     { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER },
  125.     { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER },
  126.     { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER },
  127.     { TILEGX_TP_REGNUM,  REVERSE_STATE_REGISTER },
  128.     { TILEGX_SP_REGNUM,  REVERSE_STATE_REGISTER },
  129.     { TILEGX_LR_REGNUM,  REVERSE_STATE_REGISTER },
  130.     { 0, REVERSE_STATE_UNKNOWN },
  131.     { 0, REVERSE_STATE_UNKNOWN },
  132.     { 0, REVERSE_STATE_UNKNOWN },
  133.     { 0, REVERSE_STATE_UNKNOWN },
  134.     { 0, REVERSE_STATE_UNKNOWN },
  135.     { 0, REVERSE_STATE_UNKNOWN },
  136.     { 0, REVERSE_STATE_UNKNOWN },
  137.     { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE }
  138.   };

  140. /* Implement the "register_name" gdbarch method.  */

  142. static const char *
  143. ‌tilegx_register_name (struct gdbarch *gdbarch, int regnum)
  144. {
  145.   static const char *const register_names[TILEGX_NUM_REGS] =
  146.     {
  147.       "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
  148.       "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
  149.       "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
  150.       "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
  151.       "r32",  "r33",  "r34",  "r35",  "r36",  "r37",  "r38",  "r39",
  152.       "r40",  "r41",  "r42",  "r43",  "r44",  "r45",  "r46",  "r47",
  153.       "r48",  "r49",  "r50",  "r51",  "r52",  "tp",   "sp",   "lr",
  154.       "sn",   "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",
  155.       "pc",   "faultnum",
  156.     };

  158.   if (regnum < 0 || regnum >= TILEGX_NUM_REGS)
  159.     internal_error (__FILE__, __LINE__,
  160.                     "tilegx_register_name: invalid register number %d",
  161.                     regnum);

  163.   return register_names[regnum];
  164. }

  166. /* This is the implementation of gdbarch method register_type.  */

  168. static struct type *
  169. ‌tilegx_register_type (struct gdbarch *gdbarch, int regnum)
  170. {
  171.   if (regnum == TILEGX_PC_REGNUM)
  172.     return builtin_type (gdbarch)->builtin_func_ptr;
  173.   else
  174.     return builtin_type (gdbarch)->builtin_uint64;
  175. }

  177. /* This is the implementation of gdbarch method dwarf2_reg_to_regnum.  */

  179. static int
  180. ‌tilegx_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int num)
  181. {
  182.   return num;
  183. }

  185. /* Makes the decision of whether a given type is a scalar type.
  186.    Scalar types are returned in the registers r2-r11 as they fit.  */

  188. static int
  189. ‌tilegx_type_is_scalar (struct type *t)
  190. {
  191.   return (TYPE_CODE(t) != TYPE_CODE_STRUCT
  192.           && TYPE_CODE(t) != TYPE_CODE_UNION
  193.           && TYPE_CODE(t) != TYPE_CODE_ARRAY);
  194. }

  196. /* Returns non-zero if the given struct type will be returned using
  197.    a special convention, rather than the normal function return method.
  198.    Used in the context of the "return" command, and target function
  199.    calls from the debugger.  */

  201. static int
  202. ‌tilegx_use_struct_convention (struct type *type)
  203. {
  204.   /* Only scalars which fit in R0 - R9 can be returned in registers.
  205.      Otherwise, they are returned via a pointer passed in R0.  */
  206.   return (!tilegx_type_is_scalar (type)
  207.           && (TYPE_LENGTH (type) > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM)
  208.               * tilegx_reg_size));
  209. }

  211. /* Find a function's return value in the appropriate registers (in
  212.    REGCACHE), and copy it into VALBUF.  */

  214. static void
  215. ‌tilegx_extract_return_value (struct type *type, struct regcache *regcache,
  216.                              gdb_byte *valbuf)
  217. {
  218.   int len = TYPE_LENGTH (type);
  219.   int i, regnum = TILEGX_R0_REGNUM;

  221.   for (i = 0; i < len; i += tilegx_reg_size)
  222.     regcache_raw_read (regcache, regnum++, valbuf + i);
  223. }

  225. /* Copy the function return value from VALBUF into the proper
  226.    location for a function return.
  227.    Called only in the context of the "return" command.  */

  229. static void
  230. ‌tilegx_store_return_value (struct type *type, struct regcache *regcache,
  231.                            const void *valbuf)
  232. {
  233.   if (TYPE_LENGTH (type) < tilegx_reg_size)
  234.     {
  235.       /* Add leading zeros to the (little-endian) value.  */
  236.       gdb_byte buf[tilegx_reg_size] = { 0 };

  238.       memcpy (buf, valbuf, TYPE_LENGTH (type));
  239.       regcache_raw_write (regcache, TILEGX_R0_REGNUM, buf);
  240.     }
  241.   else
  242.     {
  243.       int len = TYPE_LENGTH (type);
  244.       int i, regnum = TILEGX_R0_REGNUM;

  246.       for (i = 0; i < len; i += tilegx_reg_size)
  247.         regcache_raw_write (regcache, regnum++, (gdb_byte *) valbuf + i);
  248.     }
  249. }

  251. /* This is the implementation of gdbarch method return_value.  */

  253. static enum return_value_convention
  254. ‌tilegx_return_value (struct gdbarch *gdbarch, struct value *function,
  255.                      struct type *type, struct regcache *regcache,
  256.                      gdb_byte *readbuf, const gdb_byte *writebuf)
  257. {
  258.   if (tilegx_use_struct_convention (type))
  259.     return RETURN_VALUE_STRUCT_CONVENTION;
  260.   if (writebuf)
  261.     tilegx_store_return_value (type, regcache, writebuf);
  262.   else if (readbuf)
  263.     tilegx_extract_return_value (type, regcache, readbuf);
  264.   return RETURN_VALUE_REGISTER_CONVENTION;
  265. }

  267. /* This is the implementation of gdbarch method frame_align.  */

  269. static CORE_ADDR
  270. ‌tilegx_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
  271. {
  272.   return addr & -8;
  273. }


  276. /* Implement the "push_dummy_call" gdbarch method.  */

  278. static CORE_ADDR
  279. ‌tilegx_push_dummy_call (struct gdbarch *gdbarch,
  280.                         struct value *function,
  281.                         struct regcache *regcache,
  282.                         CORE_ADDR bp_addr, int nargs,
  283.                         struct value **args,
  284.                         CORE_ADDR sp, int struct_return,
  285.                         CORE_ADDR struct_addr)
  286. {
  287.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  288.   CORE_ADDR stack_dest = sp;
  289.   int argreg = TILEGX_R0_REGNUM;
  290.   int i, j;
  291.   int typelen, slacklen, alignlen;
  292.   static const gdb_byte four_zero_words[16] = { 0 };

  294.   /* If struct_return is 1, then the struct return address will
  295.      consume one argument-passing register.  */
  296.   if (struct_return)
  297.     regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);

  299.   /* Arguments are passed in R0 - R9, and as soon as an argument
  300.      will not fit completely in the remaining registers, then it,
  301.      and all remaining arguments, are put on the stack.  */
  302.   for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++)
  303.     {
  304.       const gdb_byte *val;
  305.       typelen = TYPE_LENGTH (value_enclosing_type (args[i]));

  307.       if (typelen > (TILEGX_R9_REGNUM - argreg + 1) * tilegx_reg_size)
  308.         break;

  310.       /* Put argument into registers wordwise.        */
  311.       val = value_contents (args[i]);
  312.       for (j = 0; j < typelen; j += tilegx_reg_size)
  313.         {
  314.           /* ISSUE: Why special handling for "typelen = 4x + 1"?
  315.              I don't ever see "typelen" values except 4 and 8.        */
  316.           int n = (typelen - j == 1) ? 1 : tilegx_reg_size;
  317.           ULONGEST w = extract_unsigned_integer (val + j, n, byte_order);

  319.           regcache_cooked_write_unsigned (regcache, argreg++, w);
  320.         }
  321.     }

  323.   /* Align SP.  */
  324.   stack_dest = tilegx_frame_align (gdbarch, stack_dest);

  326.   /* Loop backwards through remaining arguments and push them on
  327.      the stack, word aligned.  */
  328.   for (j = nargs - 1; j >= i; j--)
  329.     {
  330.       gdb_byte *val;
  331.       struct cleanup *back_to;
  332.       const gdb_byte *contents = value_contents (args[j]);

  334.       typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
  335.       slacklen = align_up (typelen, 8) - typelen;
  336.       val = xmalloc (typelen + slacklen);
  337.       back_to = make_cleanup (xfree, val);
  338.       memcpy (val, contents, typelen);
  339.       memset (val + typelen, 0, slacklen);

  341.       /* Now write data to the stack.  The stack grows downwards.  */
  342.       stack_dest -= typelen + slacklen;
  343.       write_memory (stack_dest, val, typelen + slacklen);
  344.       do_cleanups (back_to);
  345.     }

  347.   /* Add 16 bytes for linkage space to the stack.  */
  348.   stack_dest = stack_dest - 16;
  349.   write_memory (stack_dest, four_zero_words, 16);

  351.   /* Update stack pointer.  */
  352.   regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest);

  354.   /* Set the return address register to point to the entry point of
  355.      the program, where a breakpoint lies in wait.  */
  356.   regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr);

  358.   return stack_dest;
  359. }


  362. /* Decode the instructions within the given address range.
  363.    Decide when we must have reached the end of the function prologue.
  364.    If a frame_info pointer is provided, fill in its saved_regs etc.
  365.    Returns the address of the first instruction after the prologue.
  366.    NOTE: This is often called with start_addr being the start of some
  367.    function, and end_addr being the current PC.  */

  369. static CORE_ADDR
  370. ‌tilegx_analyze_prologue (struct gdbarch* gdbarch,
  371.                          CORE_ADDR start_addr, CORE_ADDR end_addr,
  372.                          struct tilegx_frame_cache *cache,
  373.                          struct frame_info *next_frame)
  374. {
  375.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  376.   CORE_ADDR next_addr;
  377.   CORE_ADDR prolog_end = end_addr;
  378.   ULONGEST inst, inst2;
  379.   LONGEST offset;
  380.   int regnum;
  381.   gdb_byte instbuf[32 * TILEGX_BUNDLE_SIZE_IN_BYTES];
  382.   CORE_ADDR instbuf_start;
  383.   unsigned int instbuf_size;
  384.   int status;
  385.   bfd_uint64_t bundle;
  386.   struct tilegx_decoded_instruction
  387.     decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
  388.   int num_insns;
  389.   struct tilegx_reverse_regs reverse_frame[TILEGX_NUM_PHYS_REGS];
  390.   struct tilegx_reverse_regs
  391.     new_reverse_frame[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
  392.   int dest_regs[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
  393.   int reverse_frame_valid, prolog_done, branch_seen, lr_saved_on_stack_p;
  394.   LONGEST prev_sp_value;
  395.   int i, j;

  397.   if (start_addr >= end_addr
  398.       || (start_addr % TILEGX_BUNDLE_ALIGNMENT_IN_BYTES) != 0)
  399.     return end_addr;

  401.   /* Initialize the reverse frame.  This maps the CURRENT frame's
  402.      registers to the outer frame's registers (the frame on the
  403.      stack goes the other way).  */
  404.   memcpy (&reverse_frame, &template_reverse_regs, sizeof (reverse_frame));

  406.   prolog_done = 0;
  407.   branch_seen = 0;
  408.   prev_sp_value = 0;
  409.   lr_saved_on_stack_p = 0;

  411.   /* To cut down on round-trip overhead, we fetch multiple bundles
  412.      at once.  These variables describe the range of memory we have
  413.      prefetched.  */
  414.   instbuf_start = 0;
  415.   instbuf_size = 0;

  417.   for (next_addr = start_addr;
  418.        next_addr < end_addr;
  419.        next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES)
  420.     {
  421.       /* Retrieve the next instruction.  */
  422.       if (next_addr - instbuf_start >= instbuf_size)
  423.         {
  424.           /* Figure out how many bytes to fetch.  Don't span a page
  425.              boundary since that might cause an unnecessary memory
  426.              error.  */
  427.           unsigned int size_on_same_page = 4096 - (next_addr & 4095);

  429.           instbuf_size = sizeof instbuf;

  431.           if (instbuf_size > size_on_same_page)
  432.             instbuf_size = size_on_same_page;

  434.           instbuf_size = min (instbuf_size, (end_addr - next_addr));
  435.           instbuf_start = next_addr;

  437.           status = safe_frame_unwind_memory (next_frame, instbuf_start,
  438.                                              instbuf, instbuf_size);
  439.           if (status == 0)
  440.             memory_error (status, next_addr);
  441.         }

  443.       reverse_frame_valid = 0;

  445.       bundle = extract_unsigned_integer (&instbuf[next_addr - instbuf_start],
  446.                                          8, byte_order);

  448.       num_insns = parse_insn_tilegx (bundle, next_addr, decoded);

  450.       for (i = 0; i < num_insns; i++)
  451.         {
  452.           struct tilegx_decoded_instruction *this_insn = &decoded[i];
  453.           int64_t *operands = (int64_t *) this_insn->operand_values;
  454.           const struct tilegx_opcode *opcode = this_insn->opcode;

  456.           switch (opcode->mnemonic)
  457.             {
  458.             case TILEGX_OPC_ST:
  459.               if (cache
  460.                   && reverse_frame[operands[0]].state == REVERSE_STATE_VALUE
  461.                   && reverse_frame[operands[1]].state
  462.                   == REVERSE_STATE_REGISTER)
  463.                 {
  464.                   LONGEST saved_address = reverse_frame[operands[0]].value;
  465.                   unsigned saved_register
  466.                     = (unsigned) reverse_frame[operands[1]].value;

  468.                   /* realreg >= 0 and addr != -1 indicates that the
  469.                      value of saved_register is in memory location
  470.                      saved_address.  The value of realreg is not
  471.                      meaningful in this case but it must be >= 0.
  472.                      See trad-frame.h.  */
  473.                   cache->saved_regs[saved_register].realreg = saved_register;
  474.                   cache->saved_regs[saved_register].addr = saved_address;
  475.                 }
  476.               else if (cache
  477.                        && (operands[0] == TILEGX_SP_REGNUM)
  478.                        && (operands[1] == TILEGX_LR_REGNUM))
  479.                 lr_saved_on_stack_p = 1;
  480.               break;
  481.             case TILEGX_OPC_ADDI:
  482.             case TILEGX_OPC_ADDLI:
  483.               if (cache
  484.                   && operands[0] == TILEGX_SP_REGNUM
  485.                   && operands[1] == TILEGX_SP_REGNUM
  486.                   && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER)
  487.                 {
  488.                   /* Special case.  We're fixing up the stack frame.  */
  489.                   uint64_t hopefully_sp
  490.                     = (unsigned) reverse_frame[operands[1]].value;
  491.                   short op2_as_short = (short) operands[2];
  492.                   signed char op2_as_char = (signed char) operands[2];

  494.                   /* Fix up the sign-extension.  */
  495.                   if (opcode->mnemonic == TILEGX_OPC_ADDI)
  496.                     op2_as_short = op2_as_char;
  497.                   prev_sp_value = (cache->saved_regs[hopefully_sp].addr
  498.                                    - op2_as_short);

  500.                   new_reverse_frame[i].state = REVERSE_STATE_VALUE;
  501.                   new_reverse_frame[i].value
  502.                     = cache->saved_regs[hopefully_sp].addr;
  503.                   trad_frame_set_value (cache->saved_regs,
  504.                                         hopefully_sp, prev_sp_value);
  505.                 }
  506.               else
  507.                 {
  508.                   short op2_as_short = (short) operands[2];
  509.                   signed char op2_as_char = (signed char) operands[2];

  511.                   /* Fix up the sign-extension.  */
  512.                   if (opcode->mnemonic == TILEGX_OPC_ADDI)
  513.                     op2_as_short = op2_as_char;

  515.                   new_reverse_frame[i] = reverse_frame[operands[1]];
  516.                   if (new_reverse_frame[i].state == REVERSE_STATE_VALUE)
  517.                     new_reverse_frame[i].value += op2_as_short;
  518.                   else
  519.                     new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  520.                 }
  521.               reverse_frame_valid |= 1 << i;
  522.               dest_regs[i] = operands[0];
  523.               break;
  524.             case TILEGX_OPC_ADD:
  525.               if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
  526.                   && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
  527.                 {
  528.                   /* We have values -- we can do this.  */
  529.                   new_reverse_frame[i] = reverse_frame[operands[2]];
  530.                   new_reverse_frame[i].value
  531.                     += reverse_frame[operands[i]].value;
  532.                 }
  533.               else
  534.                 {
  535.                   /* We don't know anything about the values.  Punt.  */
  536.                   new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  537.                 }
  538.               reverse_frame_valid |= 1 << i;
  539.               dest_regs[i] = operands[0];
  540.               break;
  541.             case TILEGX_OPC_MOVE:
  542.               new_reverse_frame[i] = reverse_frame[operands[1]];
  543.               reverse_frame_valid |= 1 << i;
  544.               dest_regs[i] = operands[0];
  545.               break;
  546.             case TILEGX_OPC_MOVEI:
  547.             case TILEGX_OPC_MOVELI:
  548.               new_reverse_frame[i].state = REVERSE_STATE_VALUE;
  549.               new_reverse_frame[i].value = operands[1];
  550.               reverse_frame_valid |= 1 << i;
  551.               dest_regs[i] = operands[0];
  552.               break;
  553.             case TILEGX_OPC_ORI:
  554.               if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE)
  555.                 {
  556.                   /* We have a value in A -- we can do this.  */
  557.                   new_reverse_frame[i] = reverse_frame[operands[1]];
  558.                   new_reverse_frame[i].value
  559.                     = reverse_frame[operands[1]].value | operands[2];
  560.                 }
  561.               else if (operands[2] == 0)
  562.                 {
  563.                   /* This is a move.  */
  564.                   new_reverse_frame[i] = reverse_frame[operands[1]];
  565.                 }
  566.               else
  567.                 {
  568.                   /* We don't know anything about the values.  Punt.  */
  569.                   new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  570.                 }
  571.               reverse_frame_valid |= 1 << i;
  572.               dest_regs[i] = operands[0];
  573.               break;
  574.             case TILEGX_OPC_OR:
  575.               if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
  576.                   && reverse_frame[operands[1]].value == 0)
  577.                 {
  578.                   /* This is a move.  */
  579.                   new_reverse_frame[i] = reverse_frame[operands[2]];
  580.                 }
  581.               else if (reverse_frame[operands[2]].state == REVERSE_STATE_VALUE
  582.                        && reverse_frame[operands[2]].value == 0)
  583.                 {
  584.                   /* This is a move.  */
  585.                   new_reverse_frame[i] = reverse_frame[operands[1]];
  586.                 }
  587.               else
  588.                 {
  589.                   /* We don't know anything about the values.  Punt.  */
  590.                   new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  591.                 }
  592.               reverse_frame_valid |= 1 << i;
  593.               dest_regs[i] = operands[0];
  594.               break;
  595.             case TILEGX_OPC_SUB:
  596.               if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE
  597.                   && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE)
  598.                 {
  599.                   /* We have values -- we can do this.  */
  600.                   new_reverse_frame[i] = reverse_frame[operands[1]];
  601.                   new_reverse_frame[i].value
  602.                     -= reverse_frame[operands[2]].value;
  603.                 }
  604.               else
  605.                 {
  606.                   /* We don't know anything about the values.  Punt.  */
  607.                   new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  608.                 }
  609.               reverse_frame_valid |= 1 << i;
  610.               dest_regs[i] = operands[0];
  611.               break;

  613.             case TILEGX_OPC_FNOP:
  614.             case TILEGX_OPC_INFO:
  615.             case TILEGX_OPC_INFOL:
  616.               /* Nothing to see here, move on.
  617.                  Note that real NOP is treated as a 'real' instruction
  618.                  because someone must have intended that it be there.
  619.                  It therefore terminates the prolog.  */
  620.               break;

  622.             case TILEGX_OPC_J:
  623.             case TILEGX_OPC_JAL:

  625.             case TILEGX_OPC_BEQZ:
  626.             case TILEGX_OPC_BEQZT:
  627.             case TILEGX_OPC_BGEZ:
  628.             case TILEGX_OPC_BGEZT:
  629.             case TILEGX_OPC_BGTZ:
  630.             case TILEGX_OPC_BGTZT:
  631.             case TILEGX_OPC_BLBC:
  632.             case TILEGX_OPC_BLBCT:
  633.             case TILEGX_OPC_BLBS:
  634.             case TILEGX_OPC_BLBST:
  635.             case TILEGX_OPC_BLEZ:
  636.             case TILEGX_OPC_BLEZT:
  637.             case TILEGX_OPC_BLTZ:
  638.             case TILEGX_OPC_BLTZT:
  639.             case TILEGX_OPC_BNEZ:
  640.             case TILEGX_OPC_BNEZT:

  642.             case TILEGX_OPC_IRET:
  643.             case TILEGX_OPC_JALR:
  644.             case TILEGX_OPC_JALRP:
  645.             case TILEGX_OPC_JR:
  646.             case TILEGX_OPC_JRP:
  647.             case TILEGX_OPC_SWINT0:
  648.             case TILEGX_OPC_SWINT1:
  649.             case TILEGX_OPC_SWINT2:
  650.             case TILEGX_OPC_SWINT3:
  651.               /* We're really done -- this is a branch.  */
  652.               branch_seen = 1;
  653.               prolog_done = 1;
  654.               break;
  655.             default:
  656.               /* We don't know or care what this instruction is.
  657.                  All we know is that it isn't part of a prolog, and if
  658.                  there's a destination register, we're trashing it.  */
  659.               prolog_done = 1;
  660.               for (j = 0; j < opcode->num_operands; j++)
  661.                 {
  662.                   if (this_insn->operands[j]->is_dest_reg)
  663.                     {
  664.                       dest_regs[i] = operands[j];
  665.                       new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN;
  666.                       reverse_frame_valid |= 1 << i;
  667.                       break;
  668.                     }
  669.                 }
  670.               break;
  671.             }
  672.         }

  674.       /* Now update the reverse frames.  */
  675.       for (i = 0; i < num_insns; i++)
  676.         {
  677.           /* ISSUE: Does this properly handle "network" registers?  */
  678.           if ((reverse_frame_valid & (1 << i))
  679.               && dest_regs[i] != TILEGX_ZERO_REGNUM)
  680.             reverse_frame[dest_regs[i]] = new_reverse_frame[i];
  681.         }

  683.       if (prev_sp_value != 0)
  684.         {
  685.           /* GCC uses R52 as a frame pointer.  Have we seen "move r52, sp"?  */
  686.           if (reverse_frame[TILEGX_R52_REGNUM].state == REVERSE_STATE_REGISTER
  687.               && reverse_frame[TILEGX_R52_REGNUM].value == TILEGX_SP_REGNUM)
  688.           {
  689.             reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE;
  690.             reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value;
  691.           }

  693.           prev_sp_value = 0;
  694.         }

  696.       if (prolog_done && prolog_end == end_addr)
  697.         {
  698.           /* We found non-prolog code.        As such, _this_ instruction
  699.              is the one after the prolog.  We keep processing, because
  700.              there may be more prolog code in there, but this is what
  701.              we'll return.  */
  702.           /* ISSUE: There may not have actually been a prologue, and
  703.              we may have simply skipped some random instructions.  */
  704.           prolog_end = next_addr;
  705.         }
  706.       if (branch_seen)
  707.         {
  708.           /* We saw a branch.  The prolog absolutely must be over.  */
  709.           break;
  710.         }
  711.     }

  713.   if (prolog_end == end_addr && cache)
  714.     {
  715.       /* We may have terminated the prolog early, and we're certainly
  716.          at THIS point right now.  It's possible that the values of
  717.          registers we need are currently actually in other registers
  718.          (and haven't been written to memory yet).  Go find them.  */
  719.       for (i = 0; i < TILEGX_NUM_PHYS_REGS; i++)
  720.         {
  721.           if (reverse_frame[i].state == REVERSE_STATE_REGISTER
  722.               && reverse_frame[i].value != i)
  723.             {
  724.               unsigned saved_register = (unsigned) reverse_frame[i].value;

  726.               cache->saved_regs[saved_register].realreg = i;
  727.               cache->saved_regs[saved_register].addr = (LONGEST) -1;
  728.             }
  729.         }
  730.     }

  732.   if (lr_saved_on_stack_p)
  733.     {
  734.       cache->saved_regs[TILEGX_LR_REGNUM].realreg = TILEGX_LR_REGNUM;
  735.       cache->saved_regs[TILEGX_LR_REGNUM].addr =
  736.         cache->saved_regs[TILEGX_SP_REGNUM].addr;
  737.     }

  739.   return prolog_end;
  740. }

  742. /* This is the implementation of gdbarch method skip_prologue.  */

  744. static CORE_ADDR
  745. ‌tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
  746. {
  747.   CORE_ADDR func_start, end_pc;
  748.   struct obj_section *s;

  750.   /* This is the preferred method, find the end of the prologue by
  751.      using the debugging information.  */
  752.   if (find_pc_partial_function (start_pc, NULL, &func_start, NULL))
  753.     {
  754.       CORE_ADDR post_prologue_pc
  755.         = skip_prologue_using_sal (gdbarch, func_start);

  757.       if (post_prologue_pc != 0)
  758.         return max (start_pc, post_prologue_pc);
  759.     }

  761.   /* Don't straddle a section boundary.  */
  762.   s = find_pc_section (start_pc);
  763.   end_pc = start_pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES;
  764.   if (s != NULL)
  765.     end_pc = min (end_pc, obj_section_endaddr (s));

  767.   /* Otherwise, try to skip prologue the hard way.  */
  768.   return tilegx_analyze_prologue (gdbarch,
  769.                                   start_pc,
  770.                                   end_pc,
  771.                                   NULL, NULL);
  772. }

  774. /* This is the implementation of gdbarch method in_function_epilogue_p.  */

  776. static int
  777. ‌tilegx_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
  778. {
  779.   CORE_ADDR func_addr = 0, func_end = 0;

  781.   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
  782.     {
  783.       ULONGEST inst, inst2;
  784.       CORE_ADDR addr = func_end - TILEGX_BUNDLE_SIZE_IN_BYTES;

  786.       /* FIXME: Find the actual epilogue.  */
  787.       /* HACK: Just assume the final bundle is the "ret" instruction".  */
  788.       if (pc > addr)
  789.         return 1;
  790.     }
  791.   return 0;
  792. }

  794. /* This is the implementation of gdbarch method get_longjmp_target.  */

  796. static int
  797. ‌tilegx_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
  798. {
  799.   struct gdbarch *gdbarch = get_frame_arch (frame);
  800.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  801.   CORE_ADDR jb_addr;
  802.   gdb_byte buf[8];

  804.   jb_addr = get_frame_register_unsigned (frame, TILEGX_R0_REGNUM);

  806.   /* TileGX jmp_buf contains 32 elements of type __uint_reg_t which
  807.      has a size of 8 bytes.  The return address is stored in the 25th
  808.      slot.  */
  809.   if (target_read_memory (jb_addr + 25 * 8, buf, 8))
  810.     return 0;

  812.   *pc = extract_unsigned_integer (buf, 8, byte_order);

  814.   return 1;
  815. }

  817. /* by assigning the 'faultnum' reg in kernel pt_regs with this value,
  818.    kernel do_signal will not check r0. see tilegx kernel/signal.c
  819.    for details.  */
  820. ‌#define INT_SWINT_1_SIGRETURN (~0)

  822. /* Implement the "write_pc" gdbarch method.  */

  824. static void
  825. ‌tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc)
  826. {
  827.   regcache_cooked_write_unsigned (regcache, TILEGX_PC_REGNUM, pc);

  829.   /* We must be careful with modifying the program counter.  If we
  830.      just interrupted a system call, the kernel might try to restart
  831.      it when we resume the inferior.  On restarting the system call,
  832.      the kernel will try backing up the program counter even though it
  833.      no longer points at the system call.  This typically results in a
  834.      SIGSEGV or SIGILL.  We can prevent this by writing INT_SWINT_1_SIGRETURN
  835.      in the "faultnum" pseudo-register.

  837.      Note that "faultnum" is saved when setting up a dummy call frame.
  838.      This means that it is properly restored when that frame is
  839.      popped, and that the interrupted system call will be restarted
  840.      when we resume the inferior on return from a function call from
  841.      within GDB.  In all other cases the system call will not be
  842.      restarted.  */
  843.   regcache_cooked_write_unsigned (regcache, TILEGX_FAULTNUM_REGNUM,
  844.                                   INT_SWINT_1_SIGRETURN);
  845. }

  847. /* This is the implementation of gdbarch method breakpoint_from_pc.  */

  849. static const unsigned char *
  850. ‌tilegx_breakpoint_from_pc (struct gdbarch *gdbarch,
  851.                            CORE_ADDR *pcptr, int *lenptr)
  852. {
  853.   /* 64-bit pattern for a { bpt ; nop } bundle.  */
  854.   static const unsigned char breakpoint[] =
  855.     { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 };

  857.   *lenptr = sizeof (breakpoint);
  858.   return breakpoint;
  859. }

  861. /* Normal frames.  */

  863. static struct tilegx_frame_cache *
  864. ‌tilegx_frame_cache (struct frame_info *this_frame, void **this_cache)
  865. {
  866.   struct gdbarch *gdbarch = get_frame_arch (this_frame);
  867.   struct tilegx_frame_cache *cache;
  868.   CORE_ADDR current_pc;
  869.   int i;

  871.   if (*this_cache)
  872.     return *this_cache;

  874.   cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache);
  875.   *this_cache = cache;
  876.   cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
  877.   cache->base = 0;
  878.   cache->start_pc = get_frame_func (this_frame);
  879.   current_pc = get_frame_pc (this_frame);

  881.   cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
  882.   trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base);

  884.   if (cache->start_pc)
  885.     tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc,
  886.                              cache, this_frame);

  888.   cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];

  890.   return cache;
  891. }

  893. /* Retrieve the value of REGNUM in FRAME.  */

  895. static struct value*
  896. ‌tilegx_frame_prev_register (struct frame_info *this_frame,
  897.                             void **this_cache,
  898.                             int regnum)
  899. {
  900.   struct tilegx_frame_cache *info =
  901.     tilegx_frame_cache (this_frame, this_cache);

  903.   return trad_frame_get_prev_register (this_frame, info->saved_regs,
  904.                                        regnum);
  905. }

  907. /* Build frame id.  */

  909. static void
  910. ‌tilegx_frame_this_id (struct frame_info *this_frame, void **this_cache,
  911.                       struct frame_id *this_id)
  912. {
  913.   struct tilegx_frame_cache *info =
  914.     tilegx_frame_cache (this_frame, this_cache);

  916.   /* This marks the outermost frame.  */
  917.   if (info->base == 0)
  918.     return;

  920.   (*this_id) = frame_id_build (info->base, info->start_pc);
  921. }

  923. static CORE_ADDR
  924. ‌tilegx_frame_base_address (struct frame_info *this_frame, void **this_cache)
  925. {
  926.   struct tilegx_frame_cache *cache =
  927.     tilegx_frame_cache (this_frame, this_cache);

  929.   return cache->base;
  930. }

  932. ‌static const struct frame_unwind tilegx_frame_unwind = {
  933.   NORMAL_FRAME,
  934.   default_frame_unwind_stop_reason,
  935.   tilegx_frame_this_id,
  936.   tilegx_frame_prev_register,
  937.   NULL,                        /* const struct frame_data *unwind_data  */
  938.   default_frame_sniffer,       /* frame_sniffer_ftype *sniffer  */
  939.   NULL                         /* frame_prev_pc_ftype *prev_pc  */
  940. };

  942. ‌static const struct frame_base tilegx_frame_base = {
  943.   &tilegx_frame_unwind,
  944.   tilegx_frame_base_address,
  945.   tilegx_frame_base_address,
  946.   tilegx_frame_base_address
  947. };

  949. static CORE_ADDR
  950. ‌tilegx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
  951. {
  952.   return frame_unwind_register_unsigned (next_frame, TILEGX_SP_REGNUM);
  953. }

  955. static CORE_ADDR
  956. ‌tilegx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
  957. {
  958.   return frame_unwind_register_unsigned (next_frame, TILEGX_PC_REGNUM);
  959. }

  961. static struct frame_id
  962. ‌tilegx_unwind_dummy_id (struct gdbarch *gdbarch,
  963.                         struct frame_info *this_frame)
  964. {
  965.   CORE_ADDR sp;

  967.   sp = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
  968.   return frame_id_build (sp, get_frame_pc (this_frame));
  969. }


  972. /* We cannot read/write the "special" registers.  */

  974. static int
  975. ‌tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno)
  976. {
  977.   if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS)
  978.     return 0;
  979.   else if (regno == TILEGX_PC_REGNUM
  980.            || regno == TILEGX_FAULTNUM_REGNUM)
  981.     return 0;
  982.   else
  983.     return 1;
  984. }

  986. static struct gdbarch *
  987. ‌tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  988. {
  989.   struct gdbarch *gdbarch;
  990.   int arch_size = 64;

  992.   /* Handle arch_size == 32 or 64.  Default to 64.  */
  993.   if (info.abfd)
  994.     arch_size = bfd_get_arch_size (info.abfd);

  996.   /* Try to find a pre-existing architecture.  */
  997.   for (arches = gdbarch_list_lookup_by_info (arches, &info);
  998.        arches != NULL;
  999.        arches = gdbarch_list_lookup_by_info (arches->next, &info))
  1000.     {
  1001.       /* We only have two flavors -- just make sure arch_size matches.  */
  1002.       if (gdbarch_ptr_bit (arches->gdbarch) == arch_size)
  1003.         return (arches->gdbarch);
  1004.     }

  1006.   gdbarch = gdbarch_alloc (&info, NULL);

  1008.   /* Basic register fields and methods, datatype sizes and stuff.  */

  1010.   /* There are 64 physical registers which can be referenced by
  1011.      instructions (although only 56 of them can actually be
  1012.      debugged) and 1 magic register (the PC).  The other three
  1013.      magic registers (ex1, syscall, orig_r0) which are known to
  1014.      "ptrace" are ignored by "gdb".  Note that we simply pretend
  1015.      that there are 65 registers, and no "pseudo registers".  */
  1016.   set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS);
  1017.   set_gdbarch_num_pseudo_regs (gdbarch, 0);

  1019.   set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM);
  1020.   set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM);

  1022.   set_gdbarch_register_name (gdbarch, tilegx_register_name);
  1023.   set_gdbarch_register_type (gdbarch, tilegx_register_type);

  1025.   set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
  1026.   set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
  1027.   set_gdbarch_long_bit (gdbarch, arch_size);
  1028.   set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);

  1030.   set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
  1031.   set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
  1032.   set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);

  1034.   set_gdbarch_ptr_bit (gdbarch, arch_size);
  1035.   set_gdbarch_addr_bit (gdbarch, arch_size);

  1037.   set_gdbarch_cannot_fetch_register (gdbarch,
  1038.                                      tilegx_cannot_reference_register);
  1039.   set_gdbarch_cannot_store_register (gdbarch,
  1040.                                      tilegx_cannot_reference_register);

  1042.   /* Stack grows down.  */
  1043.   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);

  1045.   /* Frame Info.  */
  1046.   set_gdbarch_unwind_sp (gdbarch, tilegx_unwind_sp);
  1047.   set_gdbarch_unwind_pc (gdbarch, tilegx_unwind_pc);
  1048.   set_gdbarch_dummy_id (gdbarch, tilegx_unwind_dummy_id);
  1049.   set_gdbarch_frame_align (gdbarch, tilegx_frame_align);
  1050.   frame_base_set_default (gdbarch, &tilegx_frame_base);

  1052.   set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue);

  1054.   set_gdbarch_in_function_epilogue_p (gdbarch,
  1055.                                       tilegx_in_function_epilogue_p);

  1057.   /* Map debug registers into internal register numbers.  */
  1058.   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum);

  1060.   /* These values and methods are used when gdb calls a target function.  */
  1061.   set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call);
  1062.   set_gdbarch_get_longjmp_target (gdbarch, tilegx_get_longjmp_target);
  1063.   set_gdbarch_write_pc (gdbarch, tilegx_write_pc);
  1064.   set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc);
  1065.   set_gdbarch_return_value (gdbarch, tilegx_return_value);

  1067.   set_gdbarch_print_insn (gdbarch, print_insn_tilegx);

  1069.   gdbarch_init_osabi (info, gdbarch);

  1071.   dwarf2_append_unwinders (gdbarch);
  1072.   frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind);

  1074.   return gdbarch;
  1075. }

  1077. /* Provide a prototype to silence -Wmissing-prototypes.  */
  1078. extern initialize_file_ftype _initialize_tilegx_tdep;

  1080. void
  1081. ‌_initialize_tilegx_tdep (void)
  1082. {
  1083.   register_gdbarch_init (bfd_arch_tilegx, tilegx_gdbarch_init);
  1084. }