gdb/ppc-tdep.h - gdb

Data types defined

Macros defined

Source code

  1. /* Target-dependent code for GDB, the GNU debugger.

  3.    Copyright (C) 2000-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. #ifndef PPC_TDEP_H
  21. ‌#define PPC_TDEP_H

  23. struct gdbarch;
  24. struct frame_info;
  25. struct value;
  26. struct regcache;
  27. struct type;

  29. /* From ppc-sysv-tdep.c ...  */
  30. enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
  31.                                                         struct value *function,
  32.                                                         struct type *valtype,
  33.                                                         struct regcache *regcache,
  34.                                                         gdb_byte *readbuf,
  35.                                                         const gdb_byte *writebuf);
  36. enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
  37.                                                                struct value *function,
  38.                                                                struct type *valtype,
  39.                                                                struct regcache *regcache,
  40.                                                                gdb_byte *readbuf,
  41.                                                                const gdb_byte *writebuf);
  42. CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  43.                                         struct value *function,
  44.                                         struct regcache *regcache,
  45.                                         CORE_ADDR bp_addr, int nargs,
  46.                                         struct value **args, CORE_ADDR sp,
  47.                                         int struct_return,
  48.                                         CORE_ADDR struct_addr);
  49. CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  50.                                           struct value *function,
  51.                                           struct regcache *regcache,
  52.                                           CORE_ADDR bp_addr, int nargs,
  53.                                           struct value **args, CORE_ADDR sp,
  54.                                           int struct_return,
  55.                                           CORE_ADDR struct_addr);
  56. enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
  57.                                                           struct value *function,
  58.                                                           struct type *valtype,
  59.                                                           struct regcache *regcache,
  60.                                                           gdb_byte *readbuf,
  61.                                                           const gdb_byte *writebuf);

  63. /* From rs6000-tdep.c...  */
  64. int altivec_register_p (struct gdbarch *gdbarch, int regno);
  65. int vsx_register_p (struct gdbarch *gdbarch, int regno);
  66. int spe_register_p (struct gdbarch *gdbarch, int regno);

  68. /* Return non-zero if the architecture described by GDBARCH has
  69.    floating-point registers (f0 --- f31 and fpscr).  */
  70. int ppc_floating_point_unit_p (struct gdbarch *gdbarch);

  72. /* Return non-zero if the architecture described by GDBARCH has
  73.    Altivec registers (vr0 --- vr31, vrsave and vscr).  */
  74. int ppc_altivec_support_p (struct gdbarch *gdbarch);

  76. /* Return non-zero if the architecture described by GDBARCH has
  77.    VSX registers (vsr0 --- vsr63).  */
  78. int vsx_support_p (struct gdbarch *gdbarch);
  79. int ppc_deal_with_atomic_sequence (struct frame_info *frame);


  82. /* Register set description.  */

  84. ‌struct ppc_reg_offsets
  85. {
  86.   /* General-purpose registers.  */
  87.   int r0_offset;
  88.   int gpr_size; /* size for r0-31, pc, ps, lr, ctr.  */
  89.   int xr_size;  /* size for cr, xer, mq.  */
  90.   int pc_offset;
  91.   int ps_offset;
  92.   int cr_offset;
  93.   int lr_offset;
  94.   int ctr_offset;
  95.   int xer_offset;
  96.   int mq_offset;

  98.   /* Floating-point registers.  */
  99.   int f0_offset;
  100.   int fpscr_offset;
  101.   int fpscr_size;

  103.   /* AltiVec registers.  */
  104.   int vr0_offset;
  105.   int vscr_offset;
  106.   int vrsave_offset;
  107. };

  109. extern void ppc_supply_reg (struct regcache *regcache, int regnum,
  110.                             const gdb_byte *regs, size_t offset, int regsize);

  112. extern void ppc_collect_reg (const struct regcache *regcache, int regnum,
  113.                              gdb_byte *regs, size_t offset, int regsize);

  115. /* Supply register REGNUM in the general-purpose register set REGSET
  116.    from the buffer specified by GREGS and LEN to register cache
  117.    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

  119. extern void ppc_supply_gregset (const struct regset *regset,
  120.                                 struct regcache *regcache,
  121.                                 int regnum, const void *gregs, size_t len);

  123. /* Supply register REGNUM in the floating-point register set REGSET
  124.    from the buffer specified by FPREGS and LEN to register cache
  125.    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

  127. extern void ppc_supply_fpregset (const struct regset *regset,
  128.                                  struct regcache *regcache,
  129.                                  int regnum, const void *fpregs, size_t len);

  131. /* Supply register REGNUM in the Altivec register set REGSET
  132.    from the buffer specified by VRREGS and LEN to register cache
  133.    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

  135. extern void ppc_supply_vrregset (const struct regset *regset,
  136.                                  struct regcache *regcache,
  137.                                  int regnum, const void *vrregs, size_t len);

  139. /* Supply register REGNUM in the VSX register set REGSET
  140.    from the buffer specified by VSXREGS and LEN to register cache
  141.    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

  143. extern void ppc_supply_vsxregset (const struct regset *regset,
  144.                                  struct regcache *regcache,
  145.                                  int regnum, const void *vsxregs, size_t len);

  147. /* Collect register REGNUM in the general-purpose register set
  148.    REGSET, from register cache REGCACHE into the buffer specified by
  149.    GREGS and LEN.  If REGNUM is -1, do this for all registers in
  150.    REGSET.  */

  152. extern void ppc_collect_gregset (const struct regset *regset,
  153.                                  const struct regcache *regcache,
  154.                                  int regnum, void *gregs, size_t len);

  156. /* Collect register REGNUM in the floating-point register set
  157.    REGSET, from register cache REGCACHE into the buffer specified by
  158.    FPREGS and LEN.  If REGNUM is -1, do this for all registers in
  159.    REGSET.  */

  161. extern void ppc_collect_fpregset (const struct regset *regset,
  162.                                   const struct regcache *regcache,
  163.                                   int regnum, void *fpregs, size_t len);

  165. /* Collect register REGNUM in the Altivec register set
  166.    REGSET from register cache REGCACHE into the buffer specified by
  167.    VRREGS and LEN.  If REGNUM is -1, do this for all registers in
  168.    REGSET.  */

  170. extern void ppc_collect_vrregset (const struct regset *regset,
  171.                                   const struct regcache *regcache,
  172.                                   int regnum, void *vrregs, size_t len);

  174. /* Collect register REGNUM in the VSX register set
  175.    REGSET from register cache REGCACHE into the buffer specified by
  176.    VSXREGS and LEN.  If REGNUM is -1, do this for all registers in
  177.    REGSET.  */

  179. extern void ppc_collect_vsxregset (const struct regset *regset,
  180.                                   const struct regcache *regcache,
  181.                                   int regnum, void *vsxregs, size_t len);

  183. /* Private data that this module attaches to struct gdbarch.  */

  185. /* ELF ABI version used by the inferior.  */
  186. ‌enum powerpc_elf_abi
  187. {
  188.   POWERPC_ELF_AUTO,
  189.   POWERPC_ELF_V1,
  190.   POWERPC_ELF_V2,
  191.   POWERPC_ELF_LAST
  192. };

  194. /* Vector ABI used by the inferior.  */
  195. ‌enum powerpc_vector_abi
  196. {
  197.   POWERPC_VEC_AUTO,
  198.   POWERPC_VEC_GENERIC,
  199.   POWERPC_VEC_ALTIVEC,
  200.   POWERPC_VEC_SPE,
  201.   POWERPC_VEC_LAST
  202. };

  204. ‌struct gdbarch_tdep
  205.   {
  206.     int wordsize;                /* Size in bytes of fixed-point word.  */
  207.     int soft_float;                /* Avoid FP registers for arguments?  */

  209.     enum powerpc_elf_abi elf_abi;        /* ELF ABI version.  */

  211.     /* How to pass vector arguments.  Never set to AUTO or LAST.  */
  212.     enum powerpc_vector_abi vector_abi;

  214.     int ppc_gp0_regnum;                /* GPR register 0 */
  215.     int ppc_toc_regnum;                /* TOC register */
  216.     int ppc_ps_regnum;                /* Processor (or machine) status (%msr) */
  217.     int ppc_cr_regnum;                /* Condition register */
  218.     int ppc_lr_regnum;                /* Link register */
  219.     int ppc_ctr_regnum;                /* Count register */
  220.     int ppc_xer_regnum;                /* Integer exception register */

  222.     /* Not all PPC and RS6000 variants will have the registers
  223.        represented below.  A -1 is used to indicate that the register
  224.        is not present in this variant.  */

  226.     /* Floating-point registers.  */
  227.     int ppc_fp0_regnum;         /* Floating-point register 0.  */
  228.     int ppc_fpscr_regnum;        /* fp status and condition register.  */

  230.     /* Multiplier-Quotient Register (older POWER architectures only).  */
  231.     int ppc_mq_regnum;

  233.     /* POWER7 VSX registers.  */
  234.     int ppc_vsr0_regnum;        /* First VSX register.  */
  235.     int ppc_vsr0_upper_regnum;  /* First right most dword vsx register.  */
  236.     int ppc_efpr0_regnum;        /* First Extended FP register.  */

  238.     /* Altivec registers.  */
  239.     int ppc_vr0_regnum;                /* First AltiVec register.  */
  240.     int ppc_vrsave_regnum;        /* Last AltiVec register.  */

  242.     /* SPE registers.  */
  243.     int ppc_ev0_upper_regnum;   /* First GPR upper half register.  */
  244.     int ppc_ev0_regnum;         /* First ev register.  */
  245.     int ppc_acc_regnum;         /* SPE 'acc' register.  */
  246.     int ppc_spefscr_regnum;     /* SPE 'spefscr' register.  */

  248.     /* Decimal 128 registers.  */
  249.     int ppc_dl0_regnum;                /* First Decimal128 argument register pair.  */

  251.     /* Offset to ABI specific location where link register is saved.  */
  252.     int lr_frame_offset;

  254.     /* An array of integers, such that sim_regno[I] is the simulator
  255.        register number for GDB register number I, or -1 if the
  256.        simulator does not implement that register.  */
  257.     int *sim_regno;

  259.     /* ISA-specific types.  */
  260.     struct type *ppc_builtin_type_vec64;
  261.     struct type *ppc_builtin_type_vec128;
  262. };


  265. /* Constants for register set sizes.  */
  266. enum
  267.   {
  268.     ppc_num_gprs = 32,                /* 32 general-purpose registers.  */
  269.     ppc_num_fprs = 32,                /* 32 floating-point registers.  */
  270.     ppc_num_srs = 16,                /* 16 segment registers.  */
  271.     ppc_num_vrs = 32,                /* 32 Altivec vector registers.  */
  272.     ppc_num_vshrs = 32,                /* 32 doublewords (dword 1 of vs0~vs31).  */
  273.     ppc_num_vsrs = 64,                /* 64 VSX vector registers.  */
  274.     ppc_num_efprs = 32                /* 32 Extended FP registers.  */
  275.   };


  278. /* Register number constants.  These are GDB internal register
  279.    numbers; they are not used for the simulator or remote targets.
  280.    Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
  281.    numbers above PPC_NUM_REGS.  So are segment registers and other
  282.    target-defined registers.  */
  283. enum {
  284.   PPC_R0_REGNUM = 0,
  285.   PPC_F0_REGNUM = 32,
  286.   PPC_PC_REGNUM = 64,
  287.   PPC_MSR_REGNUM = 65,
  288.   PPC_CR_REGNUM = 66,
  289.   PPC_LR_REGNUM = 67,
  290.   PPC_CTR_REGNUM = 68,
  291.   PPC_XER_REGNUM = 69,
  292.   PPC_FPSCR_REGNUM = 70,
  293.   PPC_MQ_REGNUM = 71,
  294.   PPC_SPE_UPPER_GP0_REGNUM = 72,
  295.   PPC_SPE_ACC_REGNUM = 104,
  296.   PPC_SPE_FSCR_REGNUM = 105,
  297.   PPC_VR0_REGNUM = 106,
  298.   PPC_VSCR_REGNUM = 138,
  299.   PPC_VRSAVE_REGNUM = 139,
  300.   PPC_VSR0_UPPER_REGNUM = 140,
  301.   PPC_VSR31_UPPER_REGNUM = 171,
  302.   PPC_NUM_REGS
  303. };

  305. /* An instruction to match.  */

  307. ‌struct ppc_insn_pattern
  308. {
  309.   unsigned int mask;            /* mask the insn with this...  */
  310.   unsigned int data;            /* ...and see if it matches this.  */
  311.   int optional;                 /* If non-zero, this insn may be absent.  */
  312. };

  314. extern int ppc_insns_match_pattern (struct frame_info *frame, CORE_ADDR pc,
  315.                                     struct ppc_insn_pattern *pattern,
  316.                                     unsigned int *insns);
  317. extern CORE_ADDR ppc_insn_d_field (unsigned int insn);

  319. extern CORE_ADDR ppc_insn_ds_field (unsigned int insn);

  321. /* Instruction size.  */
  322. ‌#define PPC_INSN_SIZE 4

  324. /* Estimate for the maximum number of instrctions in a function epilogue.  */
  325. ‌#define PPC_MAX_EPILOGUE_INSTRUCTIONS  52

  327. #endif /* ppc-tdep.h */