gdb/gdbserver/linux-arm-low.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
  2.    Copyright (C) 1995-2015 Free Software Foundation, Inc.

  4.    This file is part of GDB.

  6.    This program is free software; you can redistribute it and/or modify
  7.    it under the terms of the GNU General Public License as published by
  8.    the Free Software Foundation; either version 3 of the License, or
  9.    (at your option) any later version.

  11.    This program is distributed in the hope that it will be useful,
  12.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14.    GNU General Public License for more details.

  16.    You should have received a copy of the GNU General Public License
  17.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  19. #include "server.h"
  20. #include "linux-low.h"

  22. /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  23.    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  24. #ifndef ELFMAG0
  25. #include <elf.h>
  26. #endif
  27. #include <sys/ptrace.h>
  28. #include <signal.h>

  30. /* Defined in auto-generated files.  */
  31. void init_registers_arm (void);
  32. extern const struct target_desc *tdesc_arm;

  34. void init_registers_arm_with_iwmmxt (void);
  35. extern const struct target_desc *tdesc_arm_with_iwmmxt;

  37. void init_registers_arm_with_vfpv2 (void);
  38. extern const struct target_desc *tdesc_arm_with_vfpv2;

  40. void init_registers_arm_with_vfpv3 (void);
  41. extern const struct target_desc *tdesc_arm_with_vfpv3;

  43. void init_registers_arm_with_neon (void);
  44. extern const struct target_desc *tdesc_arm_with_neon;

  46. #ifndef PTRACE_GET_THREAD_AREA
  47. ‌#define PTRACE_GET_THREAD_AREA 22
  48. #endif

  50. #ifndef PTRACE_GETWMMXREGS
  51. ‌# define PTRACE_GETWMMXREGS 18
  52. ‌# define PTRACE_SETWMMXREGS 19
  53. #endif

  55. #ifndef PTRACE_GETVFPREGS
  56. ‌# define PTRACE_GETVFPREGS 27
  57. ‌# define PTRACE_SETVFPREGS 28
  58. #endif

  60. #ifndef PTRACE_GETHBPREGS
  61. ‌#define PTRACE_GETHBPREGS 29
  62. ‌#define PTRACE_SETHBPREGS 30
  63. #endif

  65. /* Information describing the hardware breakpoint capabilities.  */
  66. static struct
  67. {
  68.   unsigned char arch;
  69.   unsigned char max_wp_length;
  70.   unsigned char wp_count;
  71.   unsigned char bp_count;
  72. ‌} arm_linux_hwbp_cap;

  74. /* Enum describing the different types of ARM hardware break-/watch-points.  */
  75. typedef enum
  76. {
  77.   arm_hwbp_break = 0,
  78.   arm_hwbp_load = 1,
  79.   arm_hwbp_store = 2,
  80.   arm_hwbp_access = 3
  81. ‌} arm_hwbp_type;

  83. /* Type describing an ARM Hardware Breakpoint Control register value.  */
  84. ‌typedef unsigned int arm_hwbp_control_t;

  86. /* Structure used to keep track of hardware break-/watch-points.  */
  87. ‌struct arm_linux_hw_breakpoint
  88. {
  89.   /* Address to break on, or being watched.  */
  90.   unsigned int address;
  91.   /* Control register for break-/watch- point.  */
  92.   arm_hwbp_control_t control;
  93. };

  95. /* Since we cannot dynamically allocate subfields of arch_process_info,
  96.    assume a maximum number of supported break-/watchpoints.  */
  97. ‌#define MAX_BPTS 32
  98. ‌#define MAX_WPTS 32

  100. /* Per-process arch-specific data we want to keep.  */
  101. ‌struct arch_process_info
  102. {
  103.   /* Hardware breakpoints for this process.  */
  104.   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
  105.   /* Hardware watchpoints for this process.  */
  106.   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
  107. };

  109. /* Per-thread arch-specific data we want to keep.  */
  110. ‌struct arch_lwp_info
  111. {
  112.   /* Non-zero if our copy differs from what's recorded in the thread.  */
  113.   char bpts_changed[MAX_BPTS];
  114.   char wpts_changed[MAX_WPTS];
  115.   /* Cached stopped data address.  */
  116.   CORE_ADDR stopped_data_address;
  117. };

  119. ‌static unsigned long arm_hwcap;

  121. /* These are in <asm/elf.h> in current kernels.  */
  122. ‌#define HWCAP_VFP       64
  123. ‌#define HWCAP_IWMMXT    512
  124. ‌#define HWCAP_NEON      4096
  125. ‌#define HWCAP_VFPv3     8192
  126. ‌#define HWCAP_VFPv3D16  16384

  128. #ifdef HAVE_SYS_REG_H
  129. #include <sys/reg.h>
  130. #endif

  132. ‌#define arm_num_regs 26

  134. ‌static int arm_regmap[] = {
  135.   0, 4, 8, 12, 16, 20, 24, 28,
  136.   32, 36, 40, 44, 48, 52, 56, 60,
  137.   -1, -1, -1, -1, -1, -1, -1, -1, -1,
  138.   64
  139. };

  141. static int
  142. ‌arm_cannot_store_register (int regno)
  143. {
  144.   return (regno >= arm_num_regs);
  145. }

  147. static int
  148. ‌arm_cannot_fetch_register (int regno)
  149. {
  150.   return (regno >= arm_num_regs);
  151. }

  153. static void
  154. ‌arm_fill_gregset (struct regcache *regcache, void *buf)
  155. {
  156.   int i;

  158.   for (i = 0; i < arm_num_regs; i++)
  159.     if (arm_regmap[i] != -1)
  160.       collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
  161. }

  163. static void
  164. ‌arm_store_gregset (struct regcache *regcache, const void *buf)
  165. {
  166.   int i;
  167.   char zerobuf[8];

  169.   memset (zerobuf, 0, 8);
  170.   for (i = 0; i < arm_num_regs; i++)
  171.     if (arm_regmap[i] != -1)
  172.       supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
  173.     else
  174.       supply_register (regcache, i, zerobuf);
  175. }

  177. static void
  178. ‌arm_fill_wmmxregset (struct regcache *regcache, void *buf)
  179. {
  180.   int i;

  182.   if (!(arm_hwcap & HWCAP_IWMMXT))
  183.     return;

  185.   for (i = 0; i < 16; i++)
  186.     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);

  188.   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
  189.   for (i = 0; i < 6; i++)
  190.     collect_register (regcache, arm_num_regs + i + 16,
  191.                       (char *) buf + 16 * 8 + i * 4);
  192. }

  194. static void
  195. ‌arm_store_wmmxregset (struct regcache *regcache, const void *buf)
  196. {
  197.   int i;

  199.   if (!(arm_hwcap & HWCAP_IWMMXT))
  200.     return;

  202.   for (i = 0; i < 16; i++)
  203.     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);

  205.   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
  206.   for (i = 0; i < 6; i++)
  207.     supply_register (regcache, arm_num_regs + i + 16,
  208.                      (char *) buf + 16 * 8 + i * 4);
  209. }

  211. static void
  212. ‌arm_fill_vfpregset (struct regcache *regcache, void *buf)
  213. {
  214.   int i, num, base;

  216.   if (!(arm_hwcap & HWCAP_VFP))
  217.     return;

  219.   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
  220.     num = 32;
  221.   else
  222.     num = 16;

  224.   base = find_regno (regcache->tdesc, "d0");
  225.   for (i = 0; i < num; i++)
  226.     collect_register (regcache, base + i, (char *) buf + i * 8);

  228.   collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
  229. }

  231. static void
  232. ‌arm_store_vfpregset (struct regcache *regcache, const void *buf)
  233. {
  234.   int i, num, base;

  236.   if (!(arm_hwcap & HWCAP_VFP))
  237.     return;

  239.   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
  240.     num = 32;
  241.   else
  242.     num = 16;

  244.   base = find_regno (regcache->tdesc, "d0");
  245.   for (i = 0; i < num; i++)
  246.     supply_register (regcache, base + i, (char *) buf + i * 8);

  248.   supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
  249. }

  251. extern int debug_threads;

  253. static CORE_ADDR
  254. ‌arm_get_pc (struct regcache *regcache)
  255. {
  256.   unsigned long pc;
  257.   collect_register_by_name (regcache, "pc", &pc);
  258.   if (debug_threads)
  259.     debug_printf ("stop pc is %08lx\n", pc);
  260.   return pc;
  261. }

  263. static void
  264. ‌arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
  265. {
  266.   unsigned long newpc = pc;
  267.   supply_register_by_name (regcache, "pc", &newpc);
  268. }

  270. /* Correct in either endianness.  */
  271. ‌static const unsigned long arm_breakpoint = 0xef9f0001;
  272. ‌#define arm_breakpoint_len 4
  273. ‌static const unsigned short thumb_breakpoint = 0xde01;
  274. ‌static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };

  276. /* For new EABI binaries.  We recognize it regardless of which ABI
  277.    is used for gdbserver, so single threaded debugging should work
  278.    OK, but for multi-threaded debugging we only insert the current
  279.    ABI's breakpoint instruction.  For now at least.  */
  280. ‌static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;

  282. static int
  283. ‌arm_breakpoint_at (CORE_ADDR where)
  284. {
  285.   struct regcache *regcache = get_thread_regcache (current_thread, 1);
  286.   unsigned long cpsr;

  288.   collect_register_by_name (regcache, "cpsr", &cpsr);

  290.   if (cpsr & 0x20)
  291.     {
  292.       /* Thumb mode.  */
  293.       unsigned short insn;

  295.       (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
  296.       if (insn == thumb_breakpoint)
  297.         return 1;

  299.       if (insn == thumb2_breakpoint[0])
  300.         {
  301.           (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
  302.           if (insn == thumb2_breakpoint[1])
  303.             return 1;
  304.         }
  305.     }
  306.   else
  307.     {
  308.       /* ARM mode.  */
  309.       unsigned long insn;

  311.       (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
  312.       if (insn == arm_breakpoint)
  313.         return 1;

  315.       if (insn == arm_eabi_breakpoint)
  316.         return 1;
  317.     }

  319.   return 0;
  320. }

  322. /* We only place breakpoints in empty marker functions, and thread locking
  323.    is outside of the function.  So rather than importing software single-step,
  324.    we can just run until exit.  */
  325. static CORE_ADDR
  326. ‌arm_reinsert_addr (void)
  327. {
  328.   struct regcache *regcache = get_thread_regcache (current_thread, 1);
  329.   unsigned long pc;
  330.   collect_register_by_name (regcache, "lr", &pc);
  331.   return pc;
  332. }

  334. /* Fetch the thread-local storage pointer for libthread_db.  */

  336. ps_err_e
  337. ‌ps_get_thread_area (const struct ps_prochandle *ph,
  338.                     lwpid_t lwpid, int idx, void **base)
  339. {
  340.   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
  341.     return PS_ERR;

  343.   /* IDX is the bias from the thread pointer to the beginning of the
  344.      thread descriptor.  It has to be subtracted due to implementation
  345.      quirks in libthread_db.  */
  346.   *base = (void *) ((char *)*base - idx);

  348.   return PS_OK;
  349. }


  352. /* Query Hardware Breakpoint information for the target we are attached to
  353.    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
  354. static void
  355. ‌arm_linux_init_hwbp_cap (int pid)
  356. {
  357.   unsigned int val;

  359.   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
  360.     return;

  362.   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
  363.   if (arm_linux_hwbp_cap.arch == 0)
  364.     return;

  366.   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
  367.   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
  368.   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);

  370.   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
  371.     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
  372.   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
  373.     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
  374. }

  376. /* How many hardware breakpoints are available?  */
  377. static int
  378. ‌arm_linux_get_hw_breakpoint_count (void)
  379. {
  380.   return arm_linux_hwbp_cap.bp_count;
  381. }

  383. /* How many hardware watchpoints are available?  */
  384. static int
  385. ‌arm_linux_get_hw_watchpoint_count (void)
  386. {
  387.   return arm_linux_hwbp_cap.wp_count;
  388. }

  390. /* Maximum length of area watched by hardware watchpoint.  */
  391. static int
  392. ‌arm_linux_get_hw_watchpoint_max_length (void)
  393. {
  394.   return arm_linux_hwbp_cap.max_wp_length;
  395. }

  397. /* Initialize an ARM hardware break-/watch-point control register value.
  398.    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
  399.    type of break-/watch-point; ENABLE indicates whether the point is enabled.
  400.    */
  401. static arm_hwbp_control_t
  402. ‌arm_hwbp_control_initialize (unsigned byte_address_select,
  403.                              arm_hwbp_type hwbp_type,
  404.                              int enable)
  405. {
  406.   gdb_assert ((byte_address_select & ~0xffU) == 0);
  407.   gdb_assert (hwbp_type != arm_hwbp_break
  408.               || ((byte_address_select & 0xfU) != 0));

  410.   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
  411. }

  413. /* Does the breakpoint control value CONTROL have the enable bit set?  */
  414. static int
  415. ‌arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
  416. {
  417.   return control & 0x1;
  418. }

  420. /* Is the breakpoint control value CONTROL initialized?  */
  421. static int
  422. ‌arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
  423. {
  424.   return control != 0;
  425. }

  427. /* Change a breakpoint control word so that it is in the disabled state.  */
  428. static arm_hwbp_control_t
  429. ‌arm_hwbp_control_disable (arm_hwbp_control_t control)
  430. {
  431.   return control & ~0x1;
  432. }

  434. /* Are two break-/watch-points equal?  */
  435. static int
  436. ‌arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
  437.                                const struct arm_linux_hw_breakpoint *p2)
  438. {
  439.   return p1->address == p2->address && p1->control == p2->control;
  440. }

  442. /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */

  444. static int
  445. ‌raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
  446. {
  447.   switch (raw_type)
  448.     {
  449.     case raw_bkpt_type_hw:
  450.       return arm_hwbp_break;
  451.     case raw_bkpt_type_write_wp:
  452.       return arm_hwbp_store;
  453.     case raw_bkpt_type_read_wp:
  454.       return arm_hwbp_load;
  455.     case raw_bkpt_type_access_wp:
  456.       return arm_hwbp_access;
  457.     default:
  458.       gdb_assert_not_reached ("unhandled raw type");
  459.     }
  460. }

  462. /* Initialize the hardware breakpoint structure P for a breakpoint or
  463.    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
  464.    Returns -1 if TYPE is unsupported, or -2 if the particular combination
  465.    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
  466.    represents a breakpoint and 1 if type represents a watchpoint.  */
  467. static int
  468. ‌arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
  469.                                int len, struct arm_linux_hw_breakpoint *p)
  470. {
  471.   arm_hwbp_type hwbp_type;
  472.   unsigned mask;

  474.   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);

  476.   if (hwbp_type == arm_hwbp_break)
  477.     {
  478.       /* For breakpoints, the length field encodes the mode.  */
  479.       switch (len)
  480.         {
  481.         case 2:         /* 16-bit Thumb mode breakpoint */
  482.         case 3:  /* 32-bit Thumb mode breakpoint */
  483.           mask = 0x3;
  484.           addr &= ~1;
  485.           break;
  486.         case 4:  /* 32-bit ARM mode breakpoint */
  487.           mask = 0xf;
  488.           addr &= ~3;
  489.           break;
  490.         default:
  491.           /* Unsupported. */
  492.           return -2;
  493.         }
  494.     }
  495.   else
  496.     {
  497.       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
  498.       CORE_ADDR aligned_addr;

  500.       /* Can not set watchpoints for zero or negative lengths.  */
  501.       if (len <= 0)
  502.         return -2;
  503.       /* The current ptrace interface can only handle watchpoints that are a
  504.          power of 2.  */
  505.       if ((len & (len - 1)) != 0)
  506.         return -2;

  508.       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
  509.          range covered by a watchpoint.  */
  510.       aligned_addr = addr & ~(max_wp_length - 1);
  511.       if (aligned_addr + max_wp_length < addr + len)
  512.         return -2;

  514.       mask = (1 << len) - 1;
  515.     }

  517.   p->address = (unsigned int) addr;
  518.   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);

  520.   return hwbp_type != arm_hwbp_break;
  521. }

  523. /* Callback to mark a watch-/breakpoint to be updated in all threads of
  524.    the current process.  */

  526. ‌struct update_registers_data
  527. {
  528.   int watch;
  529.   int i;
  530. };

  532. static int
  533. ‌update_registers_callback (struct inferior_list_entry *entry, void *arg)
  534. {
  535.   struct thread_info *thread = (struct thread_info *) entry;
  536.   struct lwp_info *lwp = get_thread_lwp (thread);
  537.   struct update_registers_data *data = (struct update_registers_data *) arg;

  539.   /* Only update the threads of the current process.  */
  540.   if (pid_of (thread) == pid_of (current_thread))
  541.     {
  542.       /* The actual update is done later just before resuming the lwp,
  543.          we just mark that the registers need updating.  */
  544.       if (data->watch)
  545.         lwp->arch_private->wpts_changed[data->i] = 1;
  546.       else
  547.         lwp->arch_private->bpts_changed[data->i] = 1;

  549.       /* If the lwp isn't stopped, force it to momentarily pause, so
  550.          we can update its breakpoint registers.  */
  551.       if (!lwp->stopped)
  552.         linux_stop_lwp (lwp);
  553.     }

  555.   return 0;
  556. }

  558. static int
  559. ‌arm_supports_z_point_type (char z_type)
  560. {
  561.   switch (z_type)
  562.     {
  563.     case Z_PACKET_HW_BP:
  564.     case Z_PACKET_WRITE_WP:
  565.     case Z_PACKET_READ_WP:
  566.     case Z_PACKET_ACCESS_WP:
  567.       return 1;
  568.     default:
  569.       /* Leave the handling of sw breakpoints with the gdb client.  */
  570.       return 0;
  571.     }
  572. }

  574. /* Insert hardware break-/watchpoint.  */
  575. static int
  576. ‌arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
  577.                   int len, struct raw_breakpoint *bp)
  578. {
  579.   struct process_info *proc = current_process ();
  580.   struct arm_linux_hw_breakpoint p, *pts;
  581.   int watch, i, count;

  583.   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
  584.   if (watch < 0)
  585.     {
  586.       /* Unsupported.  */
  587.       return watch == -1 ? 1 : -1;
  588.     }

  590.   if (watch)
  591.     {
  592.       count = arm_linux_get_hw_watchpoint_count ();
  593.       pts = proc->private->arch_private->wpts;
  594.     }
  595.   else
  596.     {
  597.       count = arm_linux_get_hw_breakpoint_count ();
  598.       pts = proc->private->arch_private->bpts;
  599.     }

  601.   for (i = 0; i < count; i++)
  602.     if (!arm_hwbp_control_is_enabled (pts[i].control))
  603.       {
  604.         struct update_registers_data data = { watch, i };
  605.         pts[i] = p;
  606.         find_inferior (&all_threads, update_registers_callback, &data);
  607.         return 0;
  608.       }

  610.   /* We're out of watchpoints.  */
  611.   return -1;
  612. }

  614. /* Remove hardware break-/watchpoint.  */
  615. static int
  616. ‌arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
  617.                   int len, struct raw_breakpoint *bp)
  618. {
  619.   struct process_info *proc = current_process ();
  620.   struct arm_linux_hw_breakpoint p, *pts;
  621.   int watch, i, count;

  623.   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
  624.   if (watch < 0)
  625.     {
  626.       /* Unsupported.  */
  627.       return -1;
  628.     }

  630.   if (watch)
  631.     {
  632.       count = arm_linux_get_hw_watchpoint_count ();
  633.       pts = proc->private->arch_private->wpts;
  634.     }
  635.   else
  636.     {
  637.       count = arm_linux_get_hw_breakpoint_count ();
  638.       pts = proc->private->arch_private->bpts;
  639.     }

  641.   for (i = 0; i < count; i++)
  642.     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
  643.       {
  644.         struct update_registers_data data = { watch, i };
  645.         pts[i].control = arm_hwbp_control_disable (pts[i].control);
  646.         find_inferior (&all_threads, update_registers_callback, &data);
  647.         return 0;
  648.       }

  650.   /* No watchpoint matched.  */
  651.   return -1;
  652. }

  654. /* Return whether current thread is stopped due to a watchpoint.  */
  655. static int
  656. ‌arm_stopped_by_watchpoint (void)
  657. {
  658.   struct lwp_info *lwp = get_thread_lwp (current_thread);
  659.   siginfo_t siginfo;

  661.   /* We must be able to set hardware watchpoints.  */
  662.   if (arm_linux_get_hw_watchpoint_count () == 0)
  663.     return 0;

  665.   /* Retrieve siginfo.  */
  666.   errno = 0;
  667.   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
  668.   if (errno != 0)
  669.     return 0;

  671.   /* This must be a hardware breakpoint.  */
  672.   if (siginfo.si_signo != SIGTRAP
  673.       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
  674.     return 0;

  676.   /* If we are in a positive slot then we're looking at a breakpoint and not
  677.      a watchpoint.  */
  678.   if (siginfo.si_errno >= 0)
  679.     return 0;

  681.   /* Cache stopped data address for use by arm_stopped_data_address.  */
  682.   lwp->arch_private->stopped_data_address
  683.     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;

  685.   return 1;
  686. }

  688. /* Return data address that triggered watchpoint.  Called only if
  689.    arm_stopped_by_watchpoint returned true.  */
  690. static CORE_ADDR
  691. ‌arm_stopped_data_address (void)
  692. {
  693.   struct lwp_info *lwp = get_thread_lwp (current_thread);
  694.   return lwp->arch_private->stopped_data_address;
  695. }

  697. /* Called when a new process is created.  */
  698. static struct arch_process_info *
  699. ‌arm_new_process (void)
  700. {
  701.   struct arch_process_info *info = xcalloc (1, sizeof (*info));
  702.   return info;
  703. }

  705. /* Called when a new thread is detected.  */
  706. static struct arch_lwp_info *
  707. ‌arm_new_thread (void)
  708. {
  709.   struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
  710.   int i;

  712.   for (i = 0; i < MAX_BPTS; i++)
  713.     info->bpts_changed[i] = 1;
  714.   for (i = 0; i < MAX_WPTS; i++)
  715.     info->wpts_changed[i] = 1;

  717.   return info;
  718. }

  720. /* Called when resuming a thread.
  721.    If the debug regs have changed, update the thread's copies.  */
  722. static void
  723. ‌arm_prepare_to_resume (struct lwp_info *lwp)
  724. {
  725.   struct thread_info *thread = get_lwp_thread (lwp);
  726.   int pid = lwpid_of (thread);
  727.   struct process_info *proc = find_process_pid (pid_of (thread));
  728.   struct arch_process_info *proc_info = proc->private->arch_private;
  729.   struct arch_lwp_info *lwp_info = lwp->arch_private;
  730.   int i;

  732.   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
  733.     if (lwp_info->bpts_changed[i])
  734.       {
  735.         errno = 0;

  737.         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
  738.           if (ptrace (PTRACE_SETHBPREGS, pid,
  739.                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
  740.                       &proc_info->bpts[i].address) < 0)
  741.             perror_with_name ("Unexpected error setting breakpoint address");

  743.         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
  744.           if (ptrace (PTRACE_SETHBPREGS, pid,
  745.                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
  746.                       &proc_info->bpts[i].control) < 0)
  747.             perror_with_name ("Unexpected error setting breakpoint");

  749.         lwp_info->bpts_changed[i] = 0;
  750.       }

  752.   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
  753.     if (lwp_info->wpts_changed[i])
  754.       {
  755.         errno = 0;

  757.         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
  758.           if (ptrace (PTRACE_SETHBPREGS, pid,
  759.                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
  760.                       &proc_info->wpts[i].address) < 0)
  761.             perror_with_name ("Unexpected error setting watchpoint address");

  763.         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
  764.           if (ptrace (PTRACE_SETHBPREGS, pid,
  765.                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
  766.                       &proc_info->wpts[i].control) < 0)
  767.             perror_with_name ("Unexpected error setting watchpoint");

  769.         lwp_info->wpts_changed[i] = 0;
  770.       }
  771. }


  774. static int
  775. ‌arm_get_hwcap (unsigned long *valp)
  776. {
  777.   unsigned char *data = alloca (8);
  778.   int offset = 0;

  780.   while ((*the_target->read_auxv) (offset, data, 8) == 8)
  781.     {
  782.       unsigned int *data_p = (unsigned int *)data;
  783.       if (data_p[0] == AT_HWCAP)
  784.         {
  785.           *valp = data_p[1];
  786.           return 1;
  787.         }

  789.       offset += 8;
  790.     }

  792.   *valp = 0;
  793.   return 0;
  794. }

  796. static const struct target_desc *
  797. ‌arm_read_description (void)
  798. {
  799.   int pid = lwpid_of (current_thread);

  801.   /* Query hardware watchpoint/breakpoint capabilities.  */
  802.   arm_linux_init_hwbp_cap (pid);

  804.   arm_hwcap = 0;
  805.   if (arm_get_hwcap (&arm_hwcap) == 0)
  806.     return tdesc_arm;

  808.   if (arm_hwcap & HWCAP_IWMMXT)
  809.     return tdesc_arm_with_iwmmxt;

  811.   if (arm_hwcap & HWCAP_VFP)
  812.     {
  813.       const struct target_desc *result;
  814.       char *buf;

  816.       /* NEON implies either no VFP, or VFPv3-D32.  We only support
  817.          it with VFP.  */
  818.       if (arm_hwcap & HWCAP_NEON)
  819.         result = tdesc_arm_with_neon;
  820.       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
  821.         result = tdesc_arm_with_vfpv3;
  822.       else
  823.         result = tdesc_arm_with_vfpv2;

  825.       /* Now make sure that the kernel supports reading these
  826.          registers.  Support was added in 2.6.30.  */
  827.       errno = 0;
  828.       buf = xmalloc (32 * 8 + 4);
  829.       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
  830.           && errno == EIO)
  831.         {
  832.           arm_hwcap = 0;
  833.           result = tdesc_arm;
  834.         }
  835.       free (buf);

  837.       return result;
  838.     }

  840.   /* The default configuration uses legacy FPA registers, probably
  841.      simulated.  */
  842.   return tdesc_arm;
  843. }

  845. static void
  846. ‌arm_arch_setup (void)
  847. {
  848.   current_process ()->tdesc = arm_read_description ();
  849. }

  851. ‌static struct regset_info arm_regsets[] = {
  852.   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
  853.     GENERAL_REGS,
  854.     arm_fill_gregset, arm_store_gregset },
  855.   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
  856.     EXTENDED_REGS,
  857.     arm_fill_wmmxregset, arm_store_wmmxregset },
  858.   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
  859.     EXTENDED_REGS,
  860.     arm_fill_vfpregset, arm_store_vfpregset },
  861.   { 0, 0, 0, -1, -1, NULL, NULL }
  862. };

  864. ‌static struct regsets_info arm_regsets_info =
  865.   {
  866.     arm_regsets, /* regsets */
  867.     0, /* num_regsets */
  868.     NULL, /* disabled_regsets */
  869.   };

  871. ‌static struct usrregs_info arm_usrregs_info =
  872.   {
  873.     arm_num_regs,
  874.     arm_regmap,
  875.   };

  877. ‌static struct regs_info regs_info =
  878.   {
  879.     NULL, /* regset_bitmap */
  880.     &arm_usrregs_info,
  881.     &arm_regsets_info
  882.   };

  884. static const struct regs_info *
  885. ‌arm_regs_info (void)
  886. {
  887.   return &regs_info;
  888. }

  890. ‌struct linux_target_ops the_low_target = {
  891.   arm_arch_setup,
  892.   arm_regs_info,
  893.   arm_cannot_fetch_register,
  894.   arm_cannot_store_register,
  895.   NULL, /* fetch_register */
  896.   arm_get_pc,
  897.   arm_set_pc,

  899.   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
  900.      library, which is most likely to be ARM.  If the kernel supports
  901.      clone events, we will never insert a breakpoint, so even a Thumb
  902.      C library will work; so will mixing EABI/non-EABI gdbserver and
  903.      application.  */
  904. #ifndef __ARM_EABI__
  905.   (const unsigned char *) &arm_breakpoint,
  906. #else
  907.   (const unsigned char *) &arm_eabi_breakpoint,
  908. #endif
  909.   arm_breakpoint_len,
  910.   arm_reinsert_addr,
  911.   0,
  912.   arm_breakpoint_at,
  913.   arm_supports_z_point_type,
  914.   arm_insert_point,
  915.   arm_remove_point,
  916.   arm_stopped_by_watchpoint,
  917.   arm_stopped_data_address,
  918.   NULL, /* collect_ptrace_register */
  919.   NULL, /* supply_ptrace_register */
  920.   NULL, /* siginfo_fixup */
  921.   arm_new_process,
  922.   arm_new_thread,
  923.   arm_prepare_to_resume,
  924. };

  926. void
  927. ‌initialize_low_arch (void)
  928. {
  929.   /* Initialize the Linux target descriptions.  */
  930.   init_registers_arm ();
  931.   init_registers_arm_with_iwmmxt ();
  932.   init_registers_arm_with_vfpv2 ();
  933.   init_registers_arm_with_vfpv3 ();
  934.   init_registers_arm_with_neon ();

  936.   initialize_regsets_info (&arm_regsets_info);
  937. }