gdb/ppc-ravenscar-thread.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* Ravenscar PowerPC target support.

  3.    Copyright (C) 2011-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. #include "defs.h"
  21. #include "gdbcore.h"
  22. #include "regcache.h"
  23. #include "ppc-tdep.h"
  24. #include "inferior.h"
  25. #include "ravenscar-thread.h"
  26. #include "ppc-ravenscar-thread.h"

  28. ‌#define NO_OFFSET -1

  30. /* See ppc-tdep.h for register numbers.  */

  32. ‌static const int powerpc_context_offsets[] =
  33. {
  34.   /* R0 - R32 */
  35.   NO_OFFSET, 0,         4,         NO_OFFSET,
  36.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  37.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  38.   NO_OFFSET, 8,         12,        16,
  39.   20,        24,        28,        32,
  40.   36,        40,        44,        48,
  41.   52,        56,        60,        64,
  42.   68,        72,        76,        80,

  44.   /* F0 - F31 */
  45.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  46.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  47.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  48.   NO_OFFSET, NO_OFFSET, 96,        104,
  49.   112,       120,       128,       136,
  50.   144,       152,       160,       168,
  51.   176,       184,       192,       200,
  52.   208,       216,       224,       232,

  54.   /* PC, MSR, CR, LR */
  55.   88,        NO_OFFSET, 84,        NO_OFFSET,

  57.   /* CTR, XER, FPSCR  */
  58.   NO_OFFSET, NO_OFFSET, 240
  59. };

  61. ‌static const int e500_context_offsets[] =
  62. {
  63.   /* R0 - R32 */
  64.   NO_OFFSET, 4,         12,        NO_OFFSET,
  65.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  66.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  67.   NO_OFFSET, 20,        28,        36,
  68.   44,        52,        60,        68,
  69.   76,        84,        92,        100,
  70.   108,       116,       124,       132,
  71.   140,       148,       156,       164,

  73.   /* F0 - F31 */
  74.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  75.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  76.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  77.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  78.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  79.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  80.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  81.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,

  83.   /* PC, MSR, CR, LR */
  84.   172,       NO_OFFSET, 168,       NO_OFFSET,

  86.   /* CTR, XER, FPSCR, MQ  */
  87.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,

  89.   /* Upper R0-R32.  */
  90.   NO_OFFSET, 0,         8,        NO_OFFSET,
  91.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  92.   NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
  93.   NO_OFFSET, 16,        24,        32,
  94.   40,        48,        56,        64,
  95.   72,        80,        88,        96,
  96.   104,       112,       120,       128,
  97.   136,       144,       152,       160,

  99.   /* ACC, FSCR */
  100.   NO_OFFSET, 176
  101. };

  103. /* The register layout info.  */

  105. ‌struct ravenscar_reg_info
  106. {
  107.   /* A table providing the offset relative to the context structure
  108.      where each register is saved.  */
  109.   const int *context_offsets;

  111.   /* The number of elements in the context_offsets table above.  */
  112.   int context_offsets_size;
  113. };

  115. /* supply register REGNUM, which has been saved on REGISTER_ADDR, to the
  116.    regcache.  */

  118. static void
  119. ‌supply_register_at_address (struct regcache *regcache, int regnum,
  120.                             CORE_ADDR register_addr)
  121. {
  122.   struct gdbarch *gdbarch = get_regcache_arch (regcache);
  123.   int buf_size = register_size (gdbarch, regnum);
  124.   gdb_byte *buf;

  126.   buf = alloca (buf_size);
  127.   read_memory (register_addr, buf, buf_size);
  128.   regcache_raw_supply (regcache, regnum, buf);
  129. }

  131. /* Return true if, for a non-running thread, REGNUM has been saved on the
  132.    Thread_Descriptor.  */

  134. static int
  135. ‌register_in_thread_descriptor_p (const struct ravenscar_reg_info *reg_info,
  136.                                  int regnum)
  137. {
  138.   return (regnum < reg_info->context_offsets_size
  139.           && reg_info->context_offsets[regnum] != NO_OFFSET);
  140. }

  142. /* to_fetch_registers when inferior_ptid is different from the running
  143.    thread.  */

  145. static void
  146. ‌ppc_ravenscar_generic_fetch_registers
  147.   (const struct ravenscar_reg_info *reg_info,
  148.    struct regcache *regcache, int regnum)
  149. {
  150.   struct gdbarch *gdbarch = get_regcache_arch (regcache);
  151.   const int sp_regnum = gdbarch_sp_regnum (gdbarch);
  152.   const int num_regs = gdbarch_num_regs (gdbarch);
  153.   int current_regnum;
  154.   CORE_ADDR current_address;
  155.   CORE_ADDR thread_descriptor_address;

  157.   /* The tid is the thread_id field, which is a pointer to the thread.  */
  158.   thread_descriptor_address = (CORE_ADDR) ptid_get_tid (inferior_ptid);

  160.   /* Read registers.  */
  161.   for (current_regnum = 0; current_regnum < num_regs; current_regnum++)
  162.     {
  163.       if (register_in_thread_descriptor_p (reg_info, current_regnum))
  164.         {
  165.           current_address = thread_descriptor_address
  166.             + reg_info->context_offsets[current_regnum];
  167.           supply_register_at_address (regcache, current_regnum,
  168.                                       current_address);
  169.         }
  170.     }
  171. }

  173. /* to_prepare_to_store when inferior_ptid is different from the running
  174.    thread.  */

  176. static void
  177. ‌ppc_ravenscar_generic_prepare_to_store (struct regcache *regcache)
  178. {
  179.   /* Nothing to do.  */
  180. }

  182. /* to_store_registers when inferior_ptid is different from the running
  183.    thread.  */

  185. static void
  186. ‌ppc_ravenscar_generic_store_registers
  187.   (const struct ravenscar_reg_info *reg_info,
  188.    struct regcache *regcache, int regnum)
  189. {
  190.   struct gdbarch *gdbarch = get_regcache_arch (regcache);
  191.   int buf_size = register_size (gdbarch, regnum);
  192.   gdb_byte buf[buf_size];
  193.   ULONGEST register_address;

  195.   if (register_in_thread_descriptor_p (reg_info, regnum))
  196.     register_address
  197.       = ptid_get_tid (inferior_ptid) + reg_info->context_offsets [regnum];
  198.   else
  199.     return;

  201.   regcache_raw_collect (regcache, regnum, buf);
  202.   write_memory (register_address,
  203.                 buf,
  204.                 buf_size);
  205. }

  207. /* The ravenscar_reg_info for most PowerPC targets.  */

  209. ‌static const struct ravenscar_reg_info ppc_reg_info =
  210. {
  211.   powerpc_context_offsets,
  212.   ARRAY_SIZE (powerpc_context_offsets),
  213. };

  215. /* Implement the to_fetch_registers ravenscar_arch_ops method
  216.    for most PowerPC targets.  */

  218. static void
  219. ‌ppc_ravenscar_powerpc_fetch_registers (struct regcache *regcache, int regnum)
  220. {
  221.   ppc_ravenscar_generic_fetch_registers (&ppc_reg_info, regcache, regnum);
  222. }

  224. /* Implement the to_store_registers ravenscar_arch_ops method
  225.    for most PowerPC targets.  */

  227. static void
  228. ‌ppc_ravenscar_powerpc_store_registers (struct regcache *regcache, int regnum)
  229. {
  230.   ppc_ravenscar_generic_store_registers (&ppc_reg_info, regcache, regnum);
  231. }

  233. /* The ravenscar_arch_ops vector for most PowerPC targets.  */

  235. ‌static struct ravenscar_arch_ops ppc_ravenscar_powerpc_ops =
  236. {
  237.   ppc_ravenscar_powerpc_fetch_registers,
  238.   ppc_ravenscar_powerpc_store_registers,
  239.   ppc_ravenscar_generic_prepare_to_store
  240. };

  242. /* Register ppc_ravenscar_powerpc_ops in GDBARCH.  */

  244. void
  245. ‌register_ppc_ravenscar_ops (struct gdbarch *gdbarch)
  246. {
  247.   set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_powerpc_ops);
  248. }

  250. /* The ravenscar_reg_info for E500 targets.  */

  252. ‌static const struct ravenscar_reg_info e500_reg_info =
  253. {
  254.   e500_context_offsets,
  255.   ARRAY_SIZE (e500_context_offsets),
  256. };

  258. /* Implement the to_fetch_registers ravenscar_arch_ops method
  259.    for E500 targets.  */

  261. static void
  262. ‌ppc_ravenscar_e500_fetch_registers (struct regcache *regcache, int regnum)
  263. {
  264.   ppc_ravenscar_generic_fetch_registers (&e500_reg_info, regcache, regnum);
  265. }

  267. /* Implement the to_store_registers ravenscar_arch_ops method
  268.    for E500 targets.  */

  270. static void
  271. ‌ppc_ravenscar_e500_store_registers (struct regcache *regcache, int regnum)
  272. {
  273.   ppc_ravenscar_generic_store_registers (&e500_reg_info, regcache, regnum);
  274. }

  276. /* The ravenscar_arch_ops vector for E500 targets.  */

  278. ‌static struct ravenscar_arch_ops ppc_ravenscar_e500_ops =
  279. {
  280.   ppc_ravenscar_e500_fetch_registers,
  281.   ppc_ravenscar_e500_store_registers,
  282.   ppc_ravenscar_generic_prepare_to_store
  283. };

  285. /* Register ppc_ravenscar_e500_ops in GDBARCH.  */

  287. void
  288. ‌register_e500_ravenscar_ops (struct gdbarch *gdbarch)
  289. {
  290.   set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_e500_ops);
  291. }