gdb/avr-tdep.c - gdb

Global variables defined

Data types defined

Functions defined

Macros defined

Source code

  1. /* Target-dependent code for Atmel AVR, for GDB.

  3.    Copyright (C) 1996-2015 Free Software Foundation, Inc.

  5.    This file is part of GDB.

  7.    This program is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3 of the License, or
  10.    (at your option) any later version.

  12.    This program is distributed in the hope that it will be useful,
  13.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15.    GNU General Public License for more details.

  17.    You should have received a copy of the GNU General Public License
  18.    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

  20. /* Contributed by Theodore A. Roth, troth@openavr.org */

  22. /* Portions of this file were taken from the original gdb-4.18 patch developed
  23.    by Denis Chertykov, denisc@overta.ru */

  25. #include "defs.h"
  26. #include "frame.h"
  27. #include "frame-unwind.h"
  28. #include "frame-base.h"
  29. #include "trad-frame.h"
  30. #include "gdbcmd.h"
  31. #include "gdbcore.h"
  32. #include "gdbtypes.h"
  33. #include "inferior.h"
  34. #include "symfile.h"
  35. #include "arch-utils.h"
  36. #include "regcache.h"
  37. #include "dis-asm.h"
  38. #include "objfiles.h"

  40. /* AVR Background:

  42.    (AVR micros are pure Harvard Architecture processors.)

  44.    The AVR family of microcontrollers have three distinctly different memory
  45.    spaces: flash, sram and eeprom.  The flash is 16 bits wide and is used for
  46.    the most part to store program instructions.  The sram is 8 bits wide and is
  47.    used for the stack and the heap.  Some devices lack sram and some can have
  48.    an additional external sram added on as a peripheral.

  50.    The eeprom is 8 bits wide and is used to store data when the device is
  51.    powered down.  Eeprom is not directly accessible, it can only be accessed
  52.    via io-registers using a special algorithm.  Accessing eeprom via gdb's
  53.    remote serial protocol ('m' or 'M' packets) looks difficult to do and is
  54.    not included at this time.

  56.    [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
  57.    written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''.  For this to
  58.    work, the remote target must be able to handle eeprom accesses and perform
  59.    the address translation.]

  61.    All three memory spaces have physical addresses beginning at 0x0.  In
  62.    addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
  63.    bytes instead of the 16 bit wide words used by the real device for the
  64.    Program Counter.

  66.    In order for remote targets to work correctly, extra bits must be added to
  67.    addresses before they are send to the target or received from the target
  68.    via the remote serial protocol.  The extra bits are the MSBs and are used to
  69.    decode which memory space the address is referring to.  */

  71. /* Constants: prefixed with AVR_ to avoid name space clashes */

  73. /* Address space flags */

  75. /* We are assigning the TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1 to the flash address
  76.    space.  */

  78. ‌#define AVR_TYPE_ADDRESS_CLASS_FLASH TYPE_ADDRESS_CLASS_1
  79. ‌#define AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH  \
  80.   TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1


  83. enum
  84. {
  85.   AVR_REG_W = 24,
  86.   AVR_REG_X = 26,
  87.   AVR_REG_Y = 28,
  88.   AVR_FP_REGNUM = 28,
  89.   AVR_REG_Z = 30,

  91.   AVR_SREG_REGNUM = 32,
  92.   AVR_SP_REGNUM = 33,
  93.   AVR_PC_REGNUM = 34,

  95.   AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
  96.   AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,

  98.   /* Pseudo registers.  */
  99.   AVR_PSEUDO_PC_REGNUM = 35,
  100.   AVR_NUM_PSEUDO_REGS = 1,

  102.   AVR_PC_REG_INDEX = 35,        /* index into array of registers */

  104.   AVR_MAX_PROLOGUE_SIZE = 64,        /* bytes */

  106.   /* Count of pushed registers.  From r2 to r17 (inclusively), r28, r29 */
  107.   AVR_MAX_PUSHES = 18,

  109.   /* Number of the last pushed register.  r17 for current avr-gcc */
  110.   AVR_LAST_PUSHED_REGNUM = 17,

  112.   AVR_ARG1_REGNUM = 24,         /* Single byte argument */
  113.   AVR_ARGN_REGNUM = 25,         /* Multi byte argments */

  115.   AVR_RET1_REGNUM = 24,         /* Single byte return value */
  116.   AVR_RETN_REGNUM = 25,         /* Multi byte return value */

  118.   /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
  119.      bits?  Do these have to match the bfd vma values?  It sure would make
  120.      things easier in the future if they didn't need to match.

  122.      Note: I chose these values so as to be consistent with bfd vma
  123.      addresses.

  125.      TRoth/2002-04-08: There is already a conflict with very large programs
  126.      in the mega128.  The mega128 has 128K instruction bytes (64K words),
  127.      thus the Most Significant Bit is 0x10000 which gets masked off my
  128.      AVR_MEM_MASK.

  130.      The problem manifests itself when trying to set a breakpoint in a
  131.      function which resides in the upper half of the instruction space and
  132.      thus requires a 17-bit address.

  134.      For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
  135.      from 0x00ff0000 to 0x00f00000.  Eeprom is not accessible from gdb yet,
  136.      but could be for some remote targets by just adding the correct offset
  137.      to the address and letting the remote target handle the low-level
  138.      details of actually accessing the eeprom.  */

  140.   AVR_IMEM_START = 0x00000000,        /* INSN memory */
  141.   AVR_SMEM_START = 0x00800000,        /* SRAM memory */
  142. #if 1
  143.   /* No eeprom mask defined */
  144.   AVR_MEM_MASK = 0x00f00000,        /* mask to determine memory space */
  145. #else
  146.   AVR_EMEM_START = 0x00810000,        /* EEPROM memory */
  147.   AVR_MEM_MASK = 0x00ff0000,        /* mask to determine memory space */
  148. #endif
  149. };

  151. /* Prologue types:

  153.    NORMAL and CALL are the typical types (the -mcall-prologues gcc option
  154.    causes the generation of the CALL type prologues).  */

  156. enum {
  157.     AVR_PROLOGUE_NONE,              /* No prologue */
  158.     AVR_PROLOGUE_NORMAL,
  159.     AVR_PROLOGUE_CALL,              /* -mcall-prologues */
  160.     AVR_PROLOGUE_MAIN,
  161.     AVR_PROLOGUE_INTR,              /* interrupt handler */
  162.     AVR_PROLOGUE_SIG,               /* signal handler */
  163. };

  165. /* Any function with a frame looks like this
  166.    .......    <-SP POINTS HERE
  167.    LOCALS1    <-FP POINTS HERE
  168.    LOCALS0
  169.    SAVED FP
  170.    SAVED R3
  171.    SAVED R2
  172.    RET PC
  173.    FIRST ARG
  174.    SECOND ARG */

  176. ‌struct avr_unwind_cache
  177. {
  178.   /* The previous frame's inner most stack address.  Used as this
  179.      frame ID's stack_addr.  */
  180.   CORE_ADDR prev_sp;
  181.   /* The frame's base, optionally used by the high-level debug info.  */
  182.   CORE_ADDR base;
  183.   int size;
  184.   int prologue_type;
  185.   /* Table indicating the location of each and every register.  */
  186.   struct trad_frame_saved_reg *saved_regs;
  187. };

  189. ‌struct gdbarch_tdep
  190. {
  191.   /* Number of bytes stored to the stack by call instructions.
  192.      2 bytes for avr1-5 and avrxmega1-5, 3 bytes for avr6 and avrxmega6-7.  */
  193.   int call_length;

  195.   /* Type for void.  */
  196.   struct type *void_type;
  197.   /* Type for a function returning void.  */
  198.   struct type *func_void_type;
  199.   /* Type for a pointer to a function.  Used for the type of PC.  */
  200.   struct type *pc_type;
  201. };

  203. /* Lookup the name of a register given it's number.  */

  205. static const char *
  206. ‌avr_register_name (struct gdbarch *gdbarch, int regnum)
  207. {
  208.   static const char * const register_names[] = {
  209.     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  210.     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
  211.     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  212.     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
  213.     "SREG", "SP", "PC2",
  214.     "pc"
  215.   };
  216.   if (regnum < 0)
  217.     return NULL;
  218.   if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
  219.     return NULL;
  220.   return register_names[regnum];
  221. }

  223. /* Return the GDB type object for the "standard" data type
  224.    of data in register N.  */

  226. static struct type *
  227. ‌avr_register_type (struct gdbarch *gdbarch, int reg_nr)
  228. {
  229.   if (reg_nr == AVR_PC_REGNUM)
  230.     return builtin_type (gdbarch)->builtin_uint32;
  231.   if (reg_nr == AVR_PSEUDO_PC_REGNUM)
  232.     return gdbarch_tdep (gdbarch)->pc_type;
  233.   if (reg_nr == AVR_SP_REGNUM)
  234.     return builtin_type (gdbarch)->builtin_data_ptr;
  235.   return builtin_type (gdbarch)->builtin_uint8;
  236. }

  238. /* Instruction address checks and convertions.  */

  240. static CORE_ADDR
  241. ‌avr_make_iaddr (CORE_ADDR x)
  242. {
  243.   return ((x) | AVR_IMEM_START);
  244. }

  246. /* FIXME: TRoth: Really need to use a larger mask for instructions.  Some
  247.    devices are already up to 128KBytes of flash space.

  249.    TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined.  */

  251. static CORE_ADDR
  252. ‌avr_convert_iaddr_to_raw (CORE_ADDR x)
  253. {
  254.   return ((x) & 0xffffffff);
  255. }

  257. /* SRAM address checks and convertions.  */

  259. static CORE_ADDR
  260. ‌avr_make_saddr (CORE_ADDR x)
  261. {
  262.   /* Return 0 for NULL.  */
  263.   if (x == 0)
  264.     return 0;

  266.   return ((x) | AVR_SMEM_START);
  267. }

  269. static CORE_ADDR
  270. ‌avr_convert_saddr_to_raw (CORE_ADDR x)
  271. {
  272.   return ((x) & 0xffffffff);
  273. }

  275. /* EEPROM address checks and convertions.  I don't know if these will ever
  276.    actually be used, but I've added them just the same.  TRoth */

  278. /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
  279.    programs in the mega128.  */

  281. /*  static CORE_ADDR */
  282. /*  avr_make_eaddr (CORE_ADDR x) */
  283. /*  { */
  284. /*    return ((x) | AVR_EMEM_START); */
  285. /*  } */

  287. /*  static int */
  288. /*  avr_eaddr_p (CORE_ADDR x) */
  289. /*  { */
  290. /*    return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
  291. /*  } */

  293. /*  static CORE_ADDR */
  294. /*  avr_convert_eaddr_to_raw (CORE_ADDR x) */
  295. /*  { */
  296. /*    return ((x) & 0xffffffff); */
  297. /*  } */

  299. /* Convert from address to pointer and vice-versa.  */

  301. static void
  302. ‌avr_address_to_pointer (struct gdbarch *gdbarch,
  303.                         struct type *type, gdb_byte *buf, CORE_ADDR addr)
  304. {
  305.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);

  307.   /* Is it a data address in flash?  */
  308.   if (AVR_TYPE_ADDRESS_CLASS_FLASH (type))
  309.     {
  310.       /* A data pointer in flash is byte addressed.  */
  311.       store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
  312.                               avr_convert_iaddr_to_raw (addr));
  313.     }
  314.   /* Is it a code address?  */
  315.   else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
  316.            || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
  317.     {
  318.       /* A code pointer is word (16 bits) addressed.  We shift the address down
  319.          by 1 bit to convert it to a pointer.  */
  320.       store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
  321.                               avr_convert_iaddr_to_raw (addr >> 1));
  322.     }
  323.   else
  324.     {
  325.       /* Strip off any upper segment bits.  */
  326.       store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
  327.                               avr_convert_saddr_to_raw (addr));
  328.     }
  329. }

  331. static CORE_ADDR
  332. ‌avr_pointer_to_address (struct gdbarch *gdbarch,
  333.                         struct type *type, const gdb_byte *buf)
  334. {
  335.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  336.   CORE_ADDR addr
  337.     = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);

  339.   /* Is it a data address in flash?  */
  340.   if (AVR_TYPE_ADDRESS_CLASS_FLASH (type))
  341.     {
  342.       /* A data pointer in flash is already byte addressed.  */
  343.       return avr_make_iaddr (addr);
  344.     }
  345.   /* Is it a code address?  */
  346.   else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
  347.            || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
  348.            || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
  349.     {
  350.       /* A code pointer is word (16 bits) addressed so we shift it up
  351.          by 1 bit to convert it to an address.  */
  352.       return avr_make_iaddr (addr << 1);
  353.     }
  354.   else
  355.     return avr_make_saddr (addr);
  356. }

  358. static CORE_ADDR
  359. ‌avr_integer_to_address (struct gdbarch *gdbarch,
  360.                         struct type *type, const gdb_byte *buf)
  361. {
  362.   ULONGEST addr = unpack_long (type, buf);

  364.   return avr_make_saddr (addr);
  365. }

  367. static CORE_ADDR
  368. ‌avr_read_pc (struct regcache *regcache)
  369. {
  370.   ULONGEST pc;
  371.   regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
  372.   return avr_make_iaddr (pc);
  373. }

  375. static void
  376. ‌avr_write_pc (struct regcache *regcache, CORE_ADDR val)
  377. {
  378.   regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
  379.                                   avr_convert_iaddr_to_raw (val));
  380. }

  382. static enum register_status
  383. ‌avr_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
  384.                           int regnum, gdb_byte *buf)
  385. {
  386.   ULONGEST val;
  387.   enum register_status status;

  389.   switch (regnum)
  390.     {
  391.     case AVR_PSEUDO_PC_REGNUM:
  392.       status = regcache_raw_read_unsigned (regcache, AVR_PC_REGNUM, &val);
  393.       if (status != REG_VALID)
  394.         return status;
  395.       val >>= 1;
  396.       store_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch), val);
  397.       return status;
  398.     default:
  399.       internal_error (__FILE__, __LINE__, _("invalid regnum"));
  400.     }
  401. }

  403. static void
  404. ‌avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
  405.                            int regnum, const gdb_byte *buf)
  406. {
  407.   ULONGEST val;

  409.   switch (regnum)
  410.     {
  411.     case AVR_PSEUDO_PC_REGNUM:
  412.       val = extract_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch));
  413.       val <<= 1;
  414.       regcache_raw_write_unsigned (regcache, AVR_PC_REGNUM, val);
  415.       break;
  416.     default:
  417.       internal_error (__FILE__, __LINE__, _("invalid regnum"));
  418.     }
  419. }

  421. /* Function: avr_scan_prologue

  423.    This function decodes an AVR function prologue to determine:
  424.      1) the size of the stack frame
  425.      2) which registers are saved on it
  426.      3) the offsets of saved regs
  427.    This information is stored in the avr_unwind_cache structure.

  429.    Some devices lack the sbiw instruction, so on those replace this:
  430.         sbiw    r28, XX
  431.    with this:
  432.         subi    r28,lo8(XX)
  433.         sbci    r29,hi8(XX)

  435.    A typical AVR function prologue with a frame pointer might look like this:
  436.         push    rXX        ; saved regs
  437.         ...
  438.         push    r28
  439.         push    r29
  440.         in      r28,__SP_L__
  441.         in      r29,__SP_H__
  442.         sbiw    r28,<LOCALS_SIZE>
  443.         in      __tmp_reg__,__SREG__
  444.         cli
  445.         out     __SP_H__,r29
  446.         out     __SREG__,__tmp_reg__
  447.         out     __SP_L__,r28

  449.    A typical AVR function prologue without a frame pointer might look like
  450.    this:
  451.         push    rXX        ; saved regs
  452.         ...

  454.    A main function prologue looks like this:
  455.         ldi     r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
  456.         ldi     r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
  457.         out     __SP_H__,r29
  458.         out     __SP_L__,r28

  460.    A signal handler prologue looks like this:
  461.         push    __zero_reg__
  462.         push    __tmp_reg__
  463.         in      __tmp_reg__, __SREG__
  464.         push    __tmp_reg__
  465.         clr     __zero_reg__
  466.         push    rXX             ; save registers r18:r27, r30:r31
  467.         ...
  468.         push    r28             ; save frame pointer
  469.         push    r29
  470.         in      r28, __SP_L__
  471.         in      r29, __SP_H__
  472.         sbiw    r28, <LOCALS_SIZE>
  473.         out     __SP_H__, r29
  474.         out     __SP_L__, r28

  476.    A interrupt handler prologue looks like this:
  477.         sei
  478.         push    __zero_reg__
  479.         push    __tmp_reg__
  480.         in      __tmp_reg__, __SREG__
  481.         push    __tmp_reg__
  482.         clr     __zero_reg__
  483.         push    rXX             ; save registers r18:r27, r30:r31
  484.         ...
  485.         push    r28             ; save frame pointer
  486.         push    r29
  487.         in      r28, __SP_L__
  488.         in      r29, __SP_H__
  489.         sbiw    r28, <LOCALS_SIZE>
  490.         cli
  491.         out     __SP_H__, r29
  492.         sei
  493.         out     __SP_L__, r28

  495.    A `-mcall-prologues' prologue looks like this (Note that the megas use a
  496.    jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
  497.    32 bit insn and rjmp is a 16 bit insn):
  498.         ldi     r26,lo8(<LOCALS_SIZE>)
  499.         ldi     r27,hi8(<LOCALS_SIZE>)
  500.         ldi     r30,pm_lo8(.L_foo_body)
  501.         ldi     r31,pm_hi8(.L_foo_body)
  502.         rjmp    __prologue_saves__+RRR
  503.         .L_foo_body:  */

  505. /* Not really part of a prologue, but still need to scan for it, is when a
  506.    function prologue moves values passed via registers as arguments to new
  507.    registers.  In this case, all local variables live in registers, so there
  508.    may be some register saves.  This is what it looks like:
  509.         movw    rMM, rNN
  510.         ...

  512.    There could be multiple movw's.  If the target doesn't have a movw insn, it
  513.    will use two mov insns.  This could be done after any of the above prologue
  514.    types.  */

  516. static CORE_ADDR
  517. ‌avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
  518.                    struct avr_unwind_cache *info)
  519. {
  520.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  521.   int i;
  522.   unsigned short insn;
  523.   int scan_stage = 0;
  524.   struct bound_minimal_symbol msymbol;
  525.   unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
  526.   int vpc = 0;
  527.   int len;

  529.   len = pc_end - pc_beg;
  530.   if (len > AVR_MAX_PROLOGUE_SIZE)
  531.     len = AVR_MAX_PROLOGUE_SIZE;

  533.   /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
  534.      reading in the bytes of the prologue.  The problem is that the figuring
  535.      out where the end of the prologue is is a bit difficult.  The old code
  536.      tried to do that, but failed quite often.  */
  537.   read_memory (pc_beg, prologue, len);

  539.   /* Scanning main()'s prologue
  540.      ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
  541.      ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
  542.      out __SP_H__,r29
  543.      out __SP_L__,r28 */

  545.   if (len >= 4)
  546.     {
  547.       CORE_ADDR locals;
  548.       static const unsigned char img[] = {
  549.         0xde, 0xbf,                /* out __SP_H__,r29 */
  550.         0xcd, 0xbf                /* out __SP_L__,r28 */
  551.       };

  553.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  554.       /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
  555.       if ((insn & 0xf0f0) == 0xe0c0)
  556.         {
  557.           locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
  558.           insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
  559.           /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
  560.           if ((insn & 0xf0f0) == 0xe0d0)
  561.             {
  562.               locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
  563.               if (vpc + 4 + sizeof (img) < len
  564.                   && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
  565.                 {
  566.                   info->prologue_type = AVR_PROLOGUE_MAIN;
  567.                   info->base = locals;
  568.                   return pc_beg + 4;
  569.                 }
  570.             }
  571.         }
  572.     }

  574.   /* Scanning `-mcall-prologues' prologue
  575.      Classic prologue is 10 bytes, mega prologue is a 12 bytes long */

  577.   while (1)        /* Using a while to avoid many goto's */
  578.     {
  579.       int loc_size;
  580.       int body_addr;
  581.       unsigned num_pushes;
  582.       int pc_offset = 0;

  584.       /* At least the fifth instruction must have been executed to
  585.          modify frame shape.  */
  586.       if (len < 10)
  587.         break;

  589.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  590.       /* ldi r26,<LOCALS_SIZE> */
  591.       if ((insn & 0xf0f0) != 0xe0a0)
  592.         break;
  593.       loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
  594.       pc_offset += 2;

  596.       insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
  597.       /* ldi r27,<LOCALS_SIZE> / 256 */
  598.       if ((insn & 0xf0f0) != 0xe0b0)
  599.         break;
  600.       loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
  601.       pc_offset += 2;

  603.       insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order);
  604.       /* ldi r30,pm_lo8(.L_foo_body) */
  605.       if ((insn & 0xf0f0) != 0xe0e0)
  606.         break;
  607.       body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
  608.       pc_offset += 2;

  610.       insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order);
  611.       /* ldi r31,pm_hi8(.L_foo_body) */
  612.       if ((insn & 0xf0f0) != 0xe0f0)
  613.         break;
  614.       body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
  615.       pc_offset += 2;

  617.       msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
  618.       if (!msymbol.minsym)
  619.         break;

  621.       insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
  622.       /* rjmp __prologue_saves__+RRR */
  623.       if ((insn & 0xf000) == 0xc000)
  624.         {
  625.           /* Extract PC relative offset from RJMP */
  626.           i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
  627.           /* Convert offset to byte addressable mode */
  628.           i *= 2;
  629.           /* Destination address */
  630.           i += pc_beg + 10;

  632.           if (body_addr != (pc_beg + 10)/2)
  633.             break;

  635.           pc_offset += 2;
  636.         }
  637.       else if ((insn & 0xfe0e) == 0x940c)
  638.         {
  639.           /* Extract absolute PC address from JMP */
  640.           i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
  641.                | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order)
  642.                   & 0xffff));
  643.           /* Convert address to byte addressable mode */
  644.           i *= 2;

  646.           if (body_addr != (pc_beg + 12)/2)
  647.             break;

  649.           pc_offset += 4;
  650.         }
  651.       else
  652.         break;

  654.       /* Resolve offset (in words) from __prologue_saves__ symbol.
  655.          Which is a pushes count in `-mcall-prologues' mode */
  656.       num_pushes = AVR_MAX_PUSHES - (i - BMSYMBOL_VALUE_ADDRESS (msymbol)) / 2;

  658.       if (num_pushes > AVR_MAX_PUSHES)
  659.         {
  660.           fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
  661.                               num_pushes);
  662.           num_pushes = 0;
  663.         }

  665.       if (num_pushes)
  666.         {
  667.           int from;

  669.           info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
  670.           if (num_pushes >= 2)
  671.             info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;

  673.           i = 0;
  674.           for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
  675.                from <= AVR_LAST_PUSHED_REGNUM; ++from)
  676.             info->saved_regs [from].addr = ++i;
  677.         }
  678.       info->size = loc_size + num_pushes;
  679.       info->prologue_type = AVR_PROLOGUE_CALL;

  681.       return pc_beg + pc_offset;
  682.     }

  684.   /* Scan for the beginning of the prologue for an interrupt or signal
  685.      function.  Note that we have to set the prologue type here since the
  686.      third stage of the prologue may not be present (e.g. no saved registered
  687.      or changing of the SP register).  */

  689.   if (1)
  690.     {
  691.       static const unsigned char img[] = {
  692.         0x78, 0x94,                /* sei */
  693.         0x1f, 0x92,                /* push r1 */
  694.         0x0f, 0x92,                /* push r0 */
  695.         0x0f, 0xb6,                /* in r0,0x3f SREG */
  696.         0x0f, 0x92,                /* push r0 */
  697.         0x11, 0x24                /* clr r1 */
  698.       };
  699.       if (len >= sizeof (img)
  700.           && memcmp (prologue, img, sizeof (img)) == 0)
  701.         {
  702.           info->prologue_type = AVR_PROLOGUE_INTR;
  703.           vpc += sizeof (img);
  704.           info->saved_regs[AVR_SREG_REGNUM].addr = 3;
  705.           info->saved_regs[0].addr = 2;
  706.           info->saved_regs[1].addr = 1;
  707.           info->size += 3;
  708.         }
  709.       else if (len >= sizeof (img) - 2
  710.                && memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
  711.         {
  712.           info->prologue_type = AVR_PROLOGUE_SIG;
  713.           vpc += sizeof (img) - 2;
  714.           info->saved_regs[AVR_SREG_REGNUM].addr = 3;
  715.           info->saved_regs[0].addr = 2;
  716.           info->saved_regs[1].addr = 1;
  717.           info->size += 2;
  718.         }
  719.     }

  721.   /* First stage of the prologue scanning.
  722.      Scan pushes (saved registers) */

  724.   for (; vpc < len; vpc += 2)
  725.     {
  726.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  727.       if ((insn & 0xfe0f) == 0x920f)        /* push rXX */
  728.         {
  729.           /* Bits 4-9 contain a mask for registers R0-R32.  */
  730.           int regno = (insn & 0x1f0) >> 4;
  731.           info->size++;
  732.           info->saved_regs[regno].addr = info->size;
  733.           scan_stage = 1;
  734.         }
  735.       else
  736.         break;
  737.     }

  739.   gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE);

  741.   /* Handle static small stack allocation using rcall or push.  */

  743.   while (scan_stage == 1 && vpc < len)
  744.     {
  745.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  746.       if (insn == 0xd000)        /* rcall .+0 */
  747.         {
  748.           info->size += gdbarch_tdep (gdbarch)->call_length;
  749.           vpc += 2;
  750.         }
  751.       else if (insn == 0x920f || insn == 0x921f)  /* push r0 or push r1 */
  752.         {
  753.           info->size += 1;
  754.           vpc += 2;
  755.         }
  756.       else
  757.         break;
  758.     }

  760.   /* Second stage of the prologue scanning.
  761.      Scan:
  762.      in r28,__SP_L__
  763.      in r29,__SP_H__ */

  765.   if (scan_stage == 1 && vpc < len)
  766.     {
  767.       static const unsigned char img[] = {
  768.         0xcd, 0xb7,                /* in r28,__SP_L__ */
  769.         0xde, 0xb7                /* in r29,__SP_H__ */
  770.       };

  772.       if (vpc + sizeof (img) < len
  773.           && memcmp (prologue + vpc, img, sizeof (img)) == 0)
  774.         {
  775.           vpc += 4;
  776.           scan_stage = 2;
  777.         }
  778.     }

  780.   /* Third stage of the prologue scanning.  (Really two stages).
  781.      Scan for:
  782.      sbiw r28,XX or subi r28,lo8(XX)
  783.                     sbci r29,hi8(XX)
  784.      in __tmp_reg__,__SREG__
  785.      cli
  786.      out __SP_H__,r29
  787.      out __SREG__,__tmp_reg__
  788.      out __SP_L__,r28 */

  790.   if (scan_stage == 2 && vpc < len)
  791.     {
  792.       int locals_size = 0;
  793.       static const unsigned char img[] = {
  794.         0x0f, 0xb6,                /* in r0,0x3f */
  795.         0xf8, 0x94,                /* cli */
  796.         0xde, 0xbf,                /* out 0x3e,r29 ; SPH */
  797.         0x0f, 0xbe,                /* out 0x3f,r0  ; SREG */
  798.         0xcd, 0xbf                /* out 0x3d,r28 ; SPL */
  799.       };
  800.       static const unsigned char img_sig[] = {
  801.         0xde, 0xbf,                /* out 0x3e,r29 ; SPH */
  802.         0xcd, 0xbf                /* out 0x3d,r28 ; SPL */
  803.       };
  804.       static const unsigned char img_int[] = {
  805.         0xf8, 0x94,                /* cli */
  806.         0xde, 0xbf,                /* out 0x3e,r29 ; SPH */
  807.         0x78, 0x94,                /* sei */
  808.         0xcd, 0xbf                /* out 0x3d,r28 ; SPL */
  809.       };

  811.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  812.       if ((insn & 0xff30) == 0x9720)        /* sbiw r28,XXX */
  813.         {
  814.           locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
  815.           vpc += 2;
  816.         }
  817.       else if ((insn & 0xf0f0) == 0x50c0)        /* subi r28,lo8(XX) */
  818.         {
  819.           locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
  820.           vpc += 2;
  821.           insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  822.           vpc += 2;
  823.           locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8;
  824.         }
  825.       else
  826.         return pc_beg + vpc;

  828.       /* Scan the last part of the prologue.  May not be present for interrupt
  829.          or signal handler functions, which is why we set the prologue type
  830.          when we saw the beginning of the prologue previously.  */

  832.       if (vpc + sizeof (img_sig) < len
  833.           && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
  834.         {
  835.           vpc += sizeof (img_sig);
  836.         }
  837.       else if (vpc + sizeof (img_int) < len
  838.                && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
  839.         {
  840.           vpc += sizeof (img_int);
  841.         }
  842.       if (vpc + sizeof (img) < len
  843.           && memcmp (prologue + vpc, img, sizeof (img)) == 0)
  844.         {
  845.           info->prologue_type = AVR_PROLOGUE_NORMAL;
  846.           vpc += sizeof (img);
  847.         }

  849.       info->size += locals_size;

  851.       /* Fall through.  */
  852.     }

  854.   /* If we got this far, we could not scan the prologue, so just return the pc
  855.      of the frame plus an adjustment for argument move insns.  */

  857.   for (; vpc < len; vpc += 2)
  858.     {
  859.       insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
  860.       if ((insn & 0xff00) == 0x0100)        /* movw rXX, rYY */
  861.         continue;
  862.       else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
  863.         continue;
  864.       else
  865.           break;
  866.     }

  868.   return pc_beg + vpc;
  869. }

  871. static CORE_ADDR
  872. ‌avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
  873. {
  874.   CORE_ADDR func_addr, func_end;
  875.   CORE_ADDR post_prologue_pc;

  877.   /* See what the symbol table says */

  879.   if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
  880.     return pc;

  882.   post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr);
  883.   if (post_prologue_pc != 0)
  884.     return max (pc, post_prologue_pc);

  886.   {
  887.     CORE_ADDR prologue_end = pc;
  888.     struct avr_unwind_cache info = {0};
  889.     struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];

  891.     info.saved_regs = saved_regs;

  893.     /* Need to run the prologue scanner to figure out if the function has a
  894.        prologue and possibly skip over moving arguments passed via registers
  895.        to other registers.  */

  897.     prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info);

  899.     if (info.prologue_type != AVR_PROLOGUE_NONE)
  900.       return prologue_end;
  901.   }

  903.   /* Either we didn't find the start of this function (nothing we can do),
  904.      or there's no line info, or the line after the prologue is after
  905.      the end of the function (there probably isn't a prologue).  */

  907.   return pc;
  908. }

  910. /* Not all avr devices support the BREAK insn.  Those that don't should treat
  911.    it as a NOP.  Thus, it should be ok.  Since the avr is currently a remote
  912.    only target, this shouldn't be a problem (I hope).  TRoth/2003-05-14  */

  914. static const unsigned char *
  915. ‌avr_breakpoint_from_pc (struct gdbarch *gdbarch,
  916.                         CORE_ADDR *pcptr, int *lenptr)
  917. {
  918.     static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
  919.     *lenptr = sizeof (avr_break_insn);
  920.     return avr_break_insn;
  921. }

  923. /* Determine, for architecture GDBARCH, how a return value of TYPE
  924.    should be returned.  If it is supposed to be returned in registers,
  925.    and READBUF is non-zero, read the appropriate value from REGCACHE,
  926.    and copy it into READBUF.  If WRITEBUF is non-zero, write the value
  927.    from WRITEBUF into REGCACHE.  */

  929. static enum return_value_convention
  930. ‌avr_return_value (struct gdbarch *gdbarch, struct value *function,
  931.                   struct type *valtype, struct regcache *regcache,
  932.                   gdb_byte *readbuf, const gdb_byte *writebuf)
  933. {
  934.   int i;
  935.   /* Single byte are returned in r24.
  936.      Otherwise, the MSB of the return value is always in r25, calculate which
  937.      register holds the LSB.  */
  938.   int lsb_reg;

  940.   if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
  941.        || TYPE_CODE (valtype) == TYPE_CODE_UNION
  942.        || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
  943.       && TYPE_LENGTH (valtype) > 8)
  944.     return RETURN_VALUE_STRUCT_CONVENTION;

  946.   if (TYPE_LENGTH (valtype) <= 2)
  947.     lsb_reg = 24;
  948.   else if (TYPE_LENGTH (valtype) <= 4)
  949.     lsb_reg = 22;
  950.   else if (TYPE_LENGTH (valtype) <= 8)
  951.     lsb_reg = 18;
  952.   else
  953.     gdb_assert_not_reached ("unexpected type length");

  955.   if (writebuf != NULL)
  956.     {
  957.       for (i = 0; i < TYPE_LENGTH (valtype); i++)
  958.         regcache_cooked_write (regcache, lsb_reg + i, writebuf + i);
  959.     }

  961.   if (readbuf != NULL)
  962.     {
  963.       for (i = 0; i < TYPE_LENGTH (valtype); i++)
  964.         regcache_cooked_read (regcache, lsb_reg + i, readbuf + i);
  965.     }

  967.   return RETURN_VALUE_REGISTER_CONVENTION;
  968. }


  971. /* Put here the code to store, into fi->saved_regs, the addresses of
  972.    the saved registers of frame described by FRAME_INFO.  This
  973.    includes special registers such as pc and fp saved in special ways
  974.    in the stack frame.  sp is even more special: the address we return
  975.    for it IS the sp for the next frame.  */

  977. static struct avr_unwind_cache *
  978. ‌avr_frame_unwind_cache (struct frame_info *this_frame,
  979.                         void **this_prologue_cache)
  980. {
  981.   CORE_ADDR start_pc, current_pc;
  982.   ULONGEST prev_sp;
  983.   ULONGEST this_base;
  984.   struct avr_unwind_cache *info;
  985.   struct gdbarch *gdbarch;
  986.   struct gdbarch_tdep *tdep;
  987.   int i;

  989.   if (*this_prologue_cache)
  990.     return *this_prologue_cache;

  992.   info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
  993.   *this_prologue_cache = info;
  994.   info->saved_regs = trad_frame_alloc_saved_regs (this_frame);

  996.   info->size = 0;
  997.   info->prologue_type = AVR_PROLOGUE_NONE;

  999.   start_pc = get_frame_func (this_frame);
  1000.   current_pc = get_frame_pc (this_frame);
  1001.   if ((start_pc > 0) && (start_pc <= current_pc))
  1002.     avr_scan_prologue (get_frame_arch (this_frame),
  1003.                        start_pc, current_pc, info);

  1005.   if ((info->prologue_type != AVR_PROLOGUE_NONE)
  1006.       && (info->prologue_type != AVR_PROLOGUE_MAIN))
  1007.     {
  1008.       ULONGEST high_base;       /* High byte of FP */

  1010.       /* The SP was moved to the FP.  This indicates that a new frame
  1011.          was created.  Get THIS frame's FP value by unwinding it from
  1012.          the next frame.  */
  1013.       this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
  1014.       high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
  1015.       this_base += (high_base << 8);

  1017.       /* The FP points at the last saved register.  Adjust the FP back
  1018.          to before the first saved register giving the SP.  */
  1019.       prev_sp = this_base + info->size;
  1020.    }
  1021.   else
  1022.     {
  1023.       /* Assume that the FP is this frame's SP but with that pushed
  1024.          stack space added back.  */
  1025.       this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
  1026.       prev_sp = this_base + info->size;
  1027.     }

  1029.   /* Add 1 here to adjust for the post-decrement nature of the push
  1030.      instruction.*/
  1031.   info->prev_sp = avr_make_saddr (prev_sp + 1);
  1032.   info->base = avr_make_saddr (this_base);

  1034.   gdbarch = get_frame_arch (this_frame);

  1036.   /* Adjust all the saved registers so that they contain addresses and not
  1037.      offsets.  */
  1038.   for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
  1039.     if (info->saved_regs[i].addr > 0)
  1040.       info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;

  1042.   /* Except for the main and startup code, the return PC is always saved on
  1043.      the stack and is at the base of the frame.  */

  1045.   if (info->prologue_type != AVR_PROLOGUE_MAIN)
  1046.     info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;

  1048.   /* The previous frame's SP needed to be computed.  Save the computed
  1049.      value.  */
  1050.   tdep = gdbarch_tdep (gdbarch);
  1051.   trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
  1052.                         info->prev_sp - 1 + tdep->call_length);

  1054.   return info;
  1055. }

  1057. static CORE_ADDR
  1058. ‌avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
  1059. {
  1060.   ULONGEST pc;

  1062.   pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);

  1064.   return avr_make_iaddr (pc);
  1065. }

  1067. static CORE_ADDR
  1068. ‌avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
  1069. {
  1070.   ULONGEST sp;

  1072.   sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);

  1074.   return avr_make_saddr (sp);
  1075. }

  1077. /* Given a GDB frame, determine the address of the calling function's
  1078.    frame.  This will be used to create a new GDB frame struct.  */

  1080. static void
  1081. ‌avr_frame_this_id (struct frame_info *this_frame,
  1082.                    void **this_prologue_cache,
  1083.                    struct frame_id *this_id)
  1084. {
  1085.   struct avr_unwind_cache *info
  1086.     = avr_frame_unwind_cache (this_frame, this_prologue_cache);
  1087.   CORE_ADDR base;
  1088.   CORE_ADDR func;
  1089.   struct frame_id id;

  1091.   /* The FUNC is easy.  */
  1092.   func = get_frame_func (this_frame);

  1094.   /* Hopefully the prologue analysis either correctly determined the
  1095.      frame's base (which is the SP from the previous frame), or set
  1096.      that base to "NULL".  */
  1097.   base = info->prev_sp;
  1098.   if (base == 0)
  1099.     return;

  1101.   id = frame_id_build (base, func);
  1102.   (*this_id) = id;
  1103. }

  1105. static struct value *
  1106. ‌avr_frame_prev_register (struct frame_info *this_frame,
  1107.                          void **this_prologue_cache, int regnum)
  1108. {
  1109.   struct gdbarch *gdbarch = get_frame_arch (this_frame);
  1110.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  1111.   struct avr_unwind_cache *info
  1112.     = avr_frame_unwind_cache (this_frame, this_prologue_cache);

  1114.   if (regnum == AVR_PC_REGNUM || regnum == AVR_PSEUDO_PC_REGNUM)
  1115.     {
  1116.       if (trad_frame_addr_p (info->saved_regs, AVR_PC_REGNUM))
  1117.         {
  1118.           /* Reading the return PC from the PC register is slightly
  1119.              abnormal.  register_size(AVR_PC_REGNUM) says it is 4 bytes,
  1120.              but in reality, only two bytes (3 in upcoming mega256) are
  1121.              stored on the stack.

  1123.              Also, note that the value on the stack is an addr to a word
  1124.              not a byte, so we will need to multiply it by two at some
  1125.              point.

  1127.              And to confuse matters even more, the return address stored
  1128.              on the stack is in big endian byte order, even though most
  1129.              everything else about the avr is little endian.  Ick!  */
  1130.           ULONGEST pc;
  1131.           int i;
  1132.           gdb_byte buf[3];
  1133.           struct gdbarch *gdbarch = get_frame_arch (this_frame);
  1134.           struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

  1136.           read_memory (info->saved_regs[AVR_PC_REGNUM].addr,
  1137.                        buf, tdep->call_length);

  1139.           /* Extract the PC read from memory as a big-endian.  */
  1140.           pc = 0;
  1141.           for (i = 0; i < tdep->call_length; i++)
  1142.             pc = (pc << 8) | buf[i];

  1144.           if (regnum == AVR_PC_REGNUM)
  1145.             pc <<= 1;

  1147.           return frame_unwind_got_constant (this_frame, regnum, pc);
  1148.         }

  1150.       return frame_unwind_got_optimized (this_frame, regnum);
  1151.     }

  1153.   return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
  1154. }

  1156. ‌static const struct frame_unwind avr_frame_unwind = {
  1157.   NORMAL_FRAME,
  1158.   default_frame_unwind_stop_reason,
  1159.   avr_frame_this_id,
  1160.   avr_frame_prev_register,
  1161.   NULL,
  1162.   default_frame_sniffer
  1163. };

  1165. static CORE_ADDR
  1166. ‌avr_frame_base_address (struct frame_info *this_frame, void **this_cache)
  1167. {
  1168.   struct avr_unwind_cache *info
  1169.     = avr_frame_unwind_cache (this_frame, this_cache);

  1171.   return info->base;
  1172. }

  1174. ‌static const struct frame_base avr_frame_base = {
  1175.   &avr_frame_unwind,
  1176.   avr_frame_base_address,
  1177.   avr_frame_base_address,
  1178.   avr_frame_base_address
  1179. };

  1181. /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
  1182.    frame.  The frame ID's base needs to match the TOS value saved by
  1183.    save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint.  */

  1185. static struct frame_id
  1186. ‌avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
  1187. {
  1188.   ULONGEST base;

  1190.   base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
  1191.   return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame));
  1192. }

  1194. /* When arguments must be pushed onto the stack, they go on in reverse
  1195.    order.  The below implements a FILO (stack) to do this.  */

  1197. ‌struct stack_item
  1198. {
  1199.   int len;
  1200.   struct stack_item *prev;
  1201.   void *data;
  1202. };

  1204. static struct stack_item *
  1205. ‌push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
  1206. {
  1207.   struct stack_item *si;
  1208.   si = xmalloc (sizeof (struct stack_item));
  1209.   si->data = xmalloc (len);
  1210.   si->len = len;
  1211.   si->prev = prev;
  1212.   memcpy (si->data, contents, len);
  1213.   return si;
  1214. }

  1216. static struct stack_item *pop_stack_item (struct stack_item *si);
  1217. static struct stack_item *
  1218. ‌pop_stack_item (struct stack_item *si)
  1219. {
  1220.   struct stack_item *dead = si;
  1221.   si = si->prev;
  1222.   xfree (dead->data);
  1223.   xfree (dead);
  1224.   return si;
  1225. }

  1227. /* Setup the function arguments for calling a function in the inferior.

  1229.    On the AVR architecture, there are 18 registers (R25 to R8) which are
  1230.    dedicated for passing function arguments.  Up to the first 18 arguments
  1231.    (depending on size) may go into these registers.  The rest go on the stack.

  1233.    All arguments are aligned to start in even-numbered registers (odd-sized
  1234.    arguments, including char, have one free register above them).  For example,
  1235.    an int in arg1 and a char in arg2 would be passed as such:

  1237.       arg1 -> r25:r24
  1238.       arg2 -> r22

  1240.    Arguments that are larger than 2 bytes will be split between two or more
  1241.    registers as available, but will NOT be split between a register and the
  1242.    stack.  Arguments that go onto the stack are pushed last arg first (this is
  1243.    similar to the d10v).  */

  1245. /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
  1246.    inaccurate.

  1248.    An exceptional case exists for struct arguments (and possibly other
  1249.    aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
  1250.    not a multiple of WORDSIZE bytes.  In this case the argument is never split
  1251.    between the registers and the stack, but instead is copied in its entirety
  1252.    onto the stack, AND also copied into as many registers as there is room
  1253.    for.  In other words, space in registers permitting, two copies of the same
  1254.    argument are passed in.  As far as I can tell, only the one on the stack is
  1255.    used, although that may be a function of the level of compiler
  1256.    optimization.  I suspect this is a compiler bug.  Arguments of these odd
  1257.    sizes are left-justified within the word (as opposed to arguments smaller
  1258.    than WORDSIZE bytes, which are right-justified).

  1260.    If the function is to return an aggregate type such as a struct, the caller
  1261.    must allocate space into which the callee will copy the return value.  In
  1262.    this case, a pointer to the return value location is passed into the callee
  1263.    in register R0, which displaces one of the other arguments passed in via
  1264.    registers R0 to R2.  */

  1266. static CORE_ADDR
  1267. ‌avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
  1268.                      struct regcache *regcache, CORE_ADDR bp_addr,
  1269.                      int nargs, struct value **args, CORE_ADDR sp,
  1270.                      int struct_return, CORE_ADDR struct_addr)
  1271. {
  1272.   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  1273.   int i;
  1274.   gdb_byte buf[3];
  1275.   int call_length = gdbarch_tdep (gdbarch)->call_length;
  1276.   CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
  1277.   int regnum = AVR_ARGN_REGNUM;
  1278.   struct stack_item *si = NULL;

  1280.   if (struct_return)
  1281.     {
  1282.       regcache_cooked_write_unsigned
  1283.         (regcache, regnum--, (struct_addr >> 8) & 0xff);
  1284.       regcache_cooked_write_unsigned
  1285.         (regcache, regnum--, struct_addr & 0xff);
  1286.       /* SP being post decremented, we need to reserve one byte so that the
  1287.          return address won't overwrite the result (or vice-versa).  */
  1288.       if (sp == struct_addr)
  1289.         sp--;
  1290.     }

  1292.   for (i = 0; i < nargs; i++)
  1293.     {
  1294.       int last_regnum;
  1295.       int j;
  1296.       struct value *arg = args[i];
  1297.       struct type *type = check_typedef (value_type (arg));
  1298.       const bfd_byte *contents = value_contents (arg);
  1299.       int len = TYPE_LENGTH (type);

  1301.       /* Calculate the potential last register needed.  */
  1302.       last_regnum = regnum - (len + (len & 1));

  1304.       /* If there are registers available, use them.  Once we start putting
  1305.          stuff on the stack, all subsequent args go on stack.  */
  1306.       if ((si == NULL) && (last_regnum >= 8))
  1307.         {
  1308.           ULONGEST val;

  1310.           /* Skip a register for odd length args.  */
  1311.           if (len & 1)
  1312.             regnum--;

  1314.           val = extract_unsigned_integer (contents, len, byte_order);
  1315.           for (j = 0; j < len; j++)
  1316.             regcache_cooked_write_unsigned
  1317.               (regcache, regnum--, val >> (8 * (len - j - 1)));
  1318.         }
  1319.       /* No registers available, push the args onto the stack.  */
  1320.       else
  1321.         {
  1322.           /* From here on, we don't care about regnum.  */
  1323.           si = push_stack_item (si, contents, len);
  1324.         }
  1325.     }

  1327.   /* Push args onto the stack.  */
  1328.   while (si)
  1329.     {
  1330.       sp -= si->len;
  1331.       /* Add 1 to sp here to account for post decr nature of pushes.  */
  1332.       write_memory (sp + 1, si->data, si->len);
  1333.       si = pop_stack_item (si);
  1334.     }

  1336.   /* Set the return address.  For the avr, the return address is the BP_ADDR.
  1337.      Need to push the return address onto the stack noting that it needs to be
  1338.      in big-endian order on the stack.  */
  1339.   for (i = 1; i <= call_length; i++)
  1340.     {
  1341.       buf[call_length - i] = return_pc & 0xff;
  1342.       return_pc >>= 8;
  1343.     }

  1345.   sp -= call_length;
  1346.   /* Use 'sp + 1' since pushes are post decr ops.  */
  1347.   write_memory (sp + 1, buf, call_length);

  1349.   /* Finally, update the SP register.  */
  1350.   regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
  1351.                                   avr_convert_saddr_to_raw (sp));

  1353.   /* Return SP value for the dummy frame, where the return address hasn't been
  1354.      pushed.  */
  1355.   return sp + call_length;
  1356. }

  1358. /* Unfortunately dwarf2 register for SP is 32.  */

  1360. static int
  1361. ‌avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
  1362. {
  1363.   if (reg >= 0 && reg < 32)
  1364.     return reg;
  1365.   if (reg == 32)
  1366.     return AVR_SP_REGNUM;

  1368.   warning (_("Unmapped DWARF Register #%d encountered."), reg);

  1370.   return -1;
  1371. }

  1373. /* Implementation of `address_class_type_flags' gdbarch method.

  1375.    This method maps DW_AT_address_class attributes to a
  1376.    type_instance_flag_value.  */

  1378. static int
  1379. ‌avr_address_class_type_flags (int byte_size, int dwarf2_addr_class)
  1380. {
  1381.   /* The value 1 of the DW_AT_address_class attribute corresponds to the
  1382.      __flash qualifier.  Note that this attribute is only valid with
  1383.      pointer types and therefore the flag is set to the pointer type and
  1384.      not its target type.  */
  1385.   if (dwarf2_addr_class == 1 && byte_size == 2)
  1386.     return AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH;
  1387.   return 0;
  1388. }

  1390. /* Implementation of `address_class_type_flags_to_name' gdbarch method.

  1392.    Convert a type_instance_flag_value to an address space qualifier.  */

  1394. static const char*
  1395. ‌avr_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
  1396. {
  1397.   if (type_flags & AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH)
  1398.     return "flash";
  1399.   else
  1400.     return NULL;
  1401. }

  1403. /* Implementation of `address_class_name_to_type_flags' gdbarch method.

  1405.    Convert an address space qualifier to a type_instance_flag_value.  */

  1407. static int
  1408. ‌avr_address_class_name_to_type_flags (struct gdbarch *gdbarch,
  1409.                                       const char* name,
  1410.                                       int *type_flags_ptr)
  1411. {
  1412.   if (strcmp (name, "flash") == 0)
  1413.     {
  1414.       *type_flags_ptr = AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH;
  1415.       return 1;
  1416.     }
  1417.   else
  1418.     return 0;
  1419. }

  1421. /* Initialize the gdbarch structure for the AVR's.  */

  1423. static struct gdbarch *
  1424. ‌avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  1425. {
  1426.   struct gdbarch *gdbarch;
  1427.   struct gdbarch_tdep *tdep;
  1428.   struct gdbarch_list *best_arch;
  1429.   int call_length;

  1431.   /* Avr-6 call instructions save 3 bytes.  */
  1432.   switch (info.bfd_arch_info->mach)
  1433.     {
  1434.     case bfd_mach_avr1:
  1435.     case bfd_mach_avrxmega1:
  1436.     case bfd_mach_avr2:
  1437.     case bfd_mach_avrxmega2:
  1438.     case bfd_mach_avr3:
  1439.     case bfd_mach_avrxmega3:
  1440.     case bfd_mach_avr4:
  1441.     case bfd_mach_avrxmega4:
  1442.     case bfd_mach_avr5:
  1443.     case bfd_mach_avrxmega5:
  1444.     default:
  1445.       call_length = 2;
  1446.       break;
  1447.     case bfd_mach_avr6:
  1448.     case bfd_mach_avrxmega6:
  1449.     case bfd_mach_avrxmega7:
  1450.       call_length = 3;
  1451.       break;
  1452.     }

  1454.   /* If there is already a candidate, use it.  */
  1455.   for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
  1456.        best_arch != NULL;
  1457.        best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
  1458.     {
  1459.       if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length)
  1460.         return best_arch->gdbarch;
  1461.     }

  1463.   /* None found, create a new architecture from the information provided.  */
  1464.   tdep = XNEW (struct gdbarch_tdep);
  1465.   gdbarch = gdbarch_alloc (&info, tdep);

  1467.   tdep->call_length = call_length;

  1469.   /* Create a type for PC.  We can't use builtin types here, as they may not
  1470.      be defined.  */
  1471.   tdep->void_type = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void");
  1472.   tdep->func_void_type = make_function_type (tdep->void_type, NULL);
  1473.   tdep->pc_type = arch_type (gdbarch, TYPE_CODE_PTR, 4, NULL);
  1474.   TYPE_TARGET_TYPE (tdep->pc_type) = tdep->func_void_type;
  1475.   TYPE_UNSIGNED (tdep->pc_type) = 1;

  1477.   set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
  1478.   set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
  1479.   set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
  1480.   set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
  1481.   set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
  1482.   set_gdbarch_addr_bit (gdbarch, 32);

  1484.   set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
  1485.   set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
  1486.   set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);

  1488.   set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
  1489.   set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
  1490.   set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);

  1492.   set_gdbarch_read_pc (gdbarch, avr_read_pc);
  1493.   set_gdbarch_write_pc (gdbarch, avr_write_pc);

  1495.   set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);

  1497.   set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
  1498.   set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);

  1500.   set_gdbarch_register_name (gdbarch, avr_register_name);
  1501.   set_gdbarch_register_type (gdbarch, avr_register_type);

  1503.   set_gdbarch_num_pseudo_regs (gdbarch, AVR_NUM_PSEUDO_REGS);
  1504.   set_gdbarch_pseudo_register_read (gdbarch, avr_pseudo_register_read);
  1505.   set_gdbarch_pseudo_register_write (gdbarch, avr_pseudo_register_write);

  1507.   set_gdbarch_return_value (gdbarch, avr_return_value);
  1508.   set_gdbarch_print_insn (gdbarch, print_insn_avr);

  1510.   set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);

  1512.   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, avr_dwarf_reg_to_regnum);

  1514.   set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
  1515.   set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
  1516.   set_gdbarch_integer_to_address (gdbarch, avr_integer_to_address);

  1518.   set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
  1519.   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);

  1521.   set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);

  1523.   frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
  1524.   frame_base_set_default (gdbarch, &avr_frame_base);

  1526.   set_gdbarch_dummy_id (gdbarch, avr_dummy_id);

  1528.   set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
  1529.   set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);

  1531.   set_gdbarch_address_class_type_flags (gdbarch, avr_address_class_type_flags);
  1532.   set_gdbarch_address_class_name_to_type_flags
  1533.     (gdbarch, avr_address_class_name_to_type_flags);
  1534.   set_gdbarch_address_class_type_flags_to_name
  1535.     (gdbarch, avr_address_class_type_flags_to_name);

  1537.   return gdbarch;
  1538. }

  1540. /* Send a query request to the avr remote target asking for values of the io
  1541.    registers.  If args parameter is not NULL, then the user has requested info
  1542.    on a specific io register [This still needs implemented and is ignored for
  1543.    now].  The query string should be one of these forms:

  1545.    "Ravr.io_reg" -> reply is "NN" number of io registers

  1547.    "Ravr.io_reg:addr,len" where addr is first register and len is number of
  1548.    registers to be read.  The reply should be "<NAME>,VV;" for each io register
  1549.    where, <NAME> is a string, and VV is the hex value of the register.

  1551.    All io registers are 8-bit.  */

  1553. static void
  1554. ‌avr_io_reg_read_command (char *args, int from_tty)
  1555. {
  1556.   LONGEST bufsiz = 0;
  1557.   gdb_byte *buf;
  1558.   const char *bufstr;
  1559.   char query[400];
  1560.   const char *p;
  1561.   unsigned int nreg = 0;
  1562.   unsigned int val;
  1563.   int i, j, k, step;

  1565.   /* Find out how many io registers the target has.  */
  1566.   bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
  1567.                               "avr.io_reg", &buf);
  1568.   bufstr = (const char *) buf;

  1570.   if (bufsiz <= 0)
  1571.     {
  1572.       fprintf_unfiltered (gdb_stderr,
  1573.                           _("ERR: info io_registers NOT supported "
  1574.                             "by current target\n"));
  1575.       return;
  1576.     }

  1578.   if (sscanf (bufstr, "%x", &nreg) != 1)
  1579.     {
  1580.       fprintf_unfiltered (gdb_stderr,
  1581.                           _("Error fetching number of io registers\n"));
  1582.       xfree (buf);
  1583.       return;
  1584.     }

  1586.   xfree (buf);

  1588.   reinitialize_more_filter ();

  1590.   printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);

  1592.   /* only fetch up to 8 registers at a time to keep the buffer small */
  1593.   step = 8;

  1595.   for (i = 0; i < nreg; i += step)
  1596.     {
  1597.       /* how many registers this round? */
  1598.       j = step;
  1599.       if ((i+j) >= nreg)
  1600.         j = nreg - i;           /* last block is less than 8 registers */

  1602.       snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
  1603.       bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
  1604.                                   query, &buf);

  1606.       p = (const char *) buf;
  1607.       for (k = i; k < (i + j); k++)
  1608.         {
  1609.           if (sscanf (p, "%[^,],%x;", query, &val) == 2)
  1610.             {
  1611.               printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
  1612.               while ((*p != ';') && (*p != '\0'))
  1613.                 p++;
  1614.               p++;                /* skip over ';' */
  1615.               if (*p == '\0')
  1616.                 break;
  1617.             }
  1618.         }

  1620.       xfree (buf);
  1621.     }
  1622. }

  1624. extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */

  1626. void
  1627. ‌_initialize_avr_tdep (void)
  1628. {
  1629.   register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);

  1631.   /* Add a new command to allow the user to query the avr remote target for
  1632.      the values of the io space registers in a saner way than just using
  1633.      `x/NNNb ADDR`.  */

  1635.   /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
  1636.      io_registers' to signify it is not available on other platforms.  */

  1638.   add_cmd ("io_registers", class_info, avr_io_reg_read_command,
  1639.            _("query remote avr target for io space register values"),
  1640.            &infolist);
  1641. }